TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 147

• Manufacturer Part Number: TMP91xy20AFG
• Manufacturer: Toshiba

Specifications of TMP91xy20AFG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M
• Rom Combinations: 8
• Ram Combinations: 8
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 77
• Power Supply Voltage(v): 3.0 to 3.6

3.9.2
X: Don’t care, −: Cannot be used
Select System
<SYSCK>
Operation of Each Circuit
(1) Prescaler, prescaler clock selects
Clock
1 (fs)
0 (fc)
SYSCR<PRCK1:0> is divided by 4 and input to the prescaler as φT0. The prescaler can
be run by selecting the baud rate generator as the waking serial clock.
among the prescaler outputs.
There is a 6-bit prescaler for waking serial clock. The clock selected using
Table 3.9.2 shows prescaler clock resolution into the baud rate generator.
The baud rate generator selects between 4-clock inputs: φT0, φT2, φT8, and φT32
Table 3.9.2 Prescaler Clock Resolution to Baud Rate Generator
Select Prescaler
<PRCK1:0>
(fc/16 clock)
Clock
(f
FPH
00
10
)
91C820A-145
XXX
000 (fc)
001 (fc/2)
010 (fc/4)
011 (fc/8)
100 (fc/16)
XXX
<GEAR2:0>
Gear Value
Prescaler Output Clock Resolution
φT0
2
2
2
2
2
2
2
2
3
4
5
6
−
/fs
/fc
/fc
/fc
/fc
/fc
2
2
2
2
2
2
2
φT2
4
4
5
6
7
8
8
/fs
/fc
/fc
/fc
/fc
/fc
/fc
2
2
2
2
2
2
2
φT8
10
10
6
6
7
8
9
/fs
/fc
/fc
/fc
/fc
/fc
/fc
TMP91C820A
φT32
2
2
2
2
2
2
2
2008-02-20
10
11
12
12
8
8
9
/fs
/fc
/fc
/fc
/fc
/fc
/fc