peb20560 Infineon Technologies Corporation, peb20560 Datasheet - Page 120

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peb20560

Manufacturer Part Number
peb20560
Description
Dsp Oriented Pbx Controller Doc
Manufacturer
Infineon Technologies Corporation
Datasheet

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Semiconductor Group
2.7.9
The boot is a process which loads the external program RAM with the DSP program.
There are three methods of booting the system:
• Emulation boot
• ROM boot
• µP boot
The boot is controlled by a boot routine which resides in the internal DSP program ROM.
This routine is starting to be executed upon chip reset according to the condition of the
strap pins:
Table 2-18 Boot Mode
No boot
Boot
Boot
Boot
Not defined
Note: When the strap pins, CDB0/BOOT, CDB1/DBG and CDB2/ROM, are not driven
2.7.9.1
The boot always starts immediately after reset with an execution of the instruction Brr-3
by the OAK. Due to the fact that during reset the OAK PC register points to address
0000
This address is on the top of the program ROM. At this address there is a branch
instruction to the beginning of the boot routine (Br FF00
At the beginning of the boot, the status of the strap pins is checked by reading the
contents of the BOOTCONF and JCONF register.
A boot sequence which loads the monitor (BI routine) to the program RAM. This
routine enables the PC emulator to control the DSP.
Downloading code directly from an external boot ROM to the program RAM.
A boot sequence which loads the Program RAM from the µP through the µP mail box.
H
, the Brr-3 instruction performs a jump to address FFFE
externally during reset, they are driven internally by an internal pull-downs.
If a fixed external pull-up is applied on a strap, a pull-up resistor of 5 KΩ is
required.
Boot Support
Boot Sequence
Boot Strap DBG Strap ROM Strap
0
1
1
1
1
Don’t care
1
0
0
1
0
1
0
Don’t care
1
2-74
Usual reset which starts fetching
from the address 0000
external program RAM.
Emulation Boot
Rom Boot
µP Boot
Forbidden
H
Functional Block Description
).
H
.
PEB 20560
H
of the
2003-08

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