peb20560 Infineon Technologies Corporation, peb20560 Datasheet - Page 38

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peb20560

Manufacturer Part Number
peb20560
Description
Dsp Oriented Pbx Controller Doc
Manufacturer
Infineon Technologies Corporation
Datasheet

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Semiconductor Group
Table 1-5 Clock Signals (additional to the IOM
Pin
No.
67
68
69
70
71
72
73
74
75
78
1)
2)
Table 1-6 µP Interface
Pin
No.
46
47
48
49
50
53
54
55
56
67
58
59
60
Shall the VCXO not be used, it is necessary to connect any other clock to this pin during reset. This clock is
temporarily needed for resetting the internal units ELIC and SIDEC.
CLK61 must always be connected as f/2 is needed for the DOC internal topic.
Symbol
CLK61
CLK40-XI
CLK40-XO
CLK16
V
CLK30
CLK15
CLK7
XCLK
REFCLK
Symbol
CS
WR
RD
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
A8
A9
VCXO
In (I)
Out (O)
I
I
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I
In (I)
Out (O)
I
I
O
I
O
O
O
O
I
I/O
During
Reset
I
I
I
I
I
I
I
I
I
I
I
I
I
During
Reset
I
I
O
I
O
O
O
O
I
I
Function
Chip Select; active low. A “low” on this line
selects all registers for read/write operations.
Write, active low, identifies a write access.
Read, active low
Address and Data Bus; multiplexed bus mode.
Handles addresses from the µP-system to the
DOC and transfers data between the µP and the
DOC.
Address Bus
1-18
Function
Main Clock of 61.44 MHz
External DSP Clock (0 … 40 MHz)
VCXO Clock of 16.384 MHz
9
Control Oscillator (Quartz) Signal
30.72 MHz (µP Clock)
15.36 MHz (OCTAT-P)
7.68 MHz (QUAT-S)
External Synchronization Clock
(e.g. 1.536 MHz)
Reference Clock (e.g. 512 kHz)
®
-2, PCM and SCC clocks)
1)
PEB 20560
2)
Overview
2003-08

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