peb20560 Infineon Technologies Corporation, peb20560 Datasheet - Page 344

• Manufacturer Part Number: peb20560
• Description: Dsp Oriented Pbx Controller Doc
• Manufacturer: Infineon Technologies Corporation

Note: Shorter frames are not reported.
RDO
CRC
RAB
HA1…0
Note: If RAH1, RAH2 contain the identical value, the combination 00 will be omitted.
C/R
LA
Semiconductor Group
HA1…0 is significant only in 2-byte address modes.
A frame is invalid when
– its length is not an integer multiple of 8 bits (n × 8 bits), e.g. 25 bit,
– its is to short, depending on the selected operation mode:
– a frame was aborted (note: VFR can also be set when a frame was
Receive Data Overflow.
A ‘1’ indicates, that a RFIFO-overflow has occurred within the actual frame.
CRC-Compare Check.
0: CRC check failed, received frame contains errors.
1: CRC check o.k., received frame is error free.
Receive message Aborted.
When ‘1’ the received frame was aborted from the transmitting station.
According to the HDLC-protocol, this frame must be discarded by the CPU.
High byte Address compare.
In operating modes which provide high byte address recognition, the
SACCO compares the high byte of a 2-byte address with the contents of two
individual programmable registers (RAH1, RAH2) and the fixed values FEH
and FCH (group address). Depending on the result of the comparison, the
following bit combinations are possible:
10…RAH1 has been recognized.
00…RAH2 has been recognized.
01…group address has been recognized.
Command/Response; significant only, if 2-byte address mode has been
selected. Value of the C/R bit (bit of high address byte) in the received frame.
Low byte Address compare.
The low byte address of a 2-byte address field or the single address byte of
a 1-byte address field is compared with two programmable registers (RAL1,
RAL2). Depending on the result of the comparison LA is set.
0…RAL2 has been recognized,
1…RAL1 has been recognized.
In non-auto mode, according to the X.25 LAP B-protocol, RAL1/RAL2 may
be programmed to differ between COMMAND/RESPONSE frames.
auto-mode/non-auto mode (2-byte address field): 4 bytes
auto-mode/non-auto mode (1-byte address field): 3 bytes
transparent mode 1:
transparent mode 0:
aborted)
5-101
Description of Registers
3 bytes
2 bytes
PEB 20560
2003-08