peb20560 Infineon Technologies Corporation, peb20560 Datasheet - Page 327

• Manufacturer Part Number: peb20560
• Description: Dsp Oriented Pbx Controller Doc
• Manufacturer: Infineon Technologies Corporation

Semiconductor Group
5.1.1.6.20 Receive Byte Count Low (RBCL)
Access: read
Reset value: 00
RBC7…0 Receive Byte Count.
5.1.1.6.21 Receive Byte Count High (RBCH)
Access: read
Reset value: 000xxxxx
DMA
OV
RBC11…8 Receive Byte Count high.
5.1.1.6.22 Transmit Byte Count Low (XBCL)
Access: write
Reset value: xx
XBC7…0
bit 7
bit 7
bit 7
RBC7
XBC7
DMA
Together with RBCH (bits RBC11 - RBC8), the length of the actual received
frame (0…4095 bytes) can be determined. These registers must be read by
the CPU following a RME interrupt.
DMA-mode status indication.
Read back value representing the DMA-bit programmed in register XBCH.
Counter Overflow.
A ‘1’ indicates that more than 4095 bytes were received.
The received frame exceeded the byte count in RBC11…RBC0.
Together with RBCL (bits RBC7…RBC0) the length of the received frame
can be determined.
Together with XBCH (bits XBC11…XBC8) this register is used in DMA-
mode to program the length of the next frame to be transmitted (1…4096
bytes). The number of transmitted bytes is XBC + 1.
Consequently the SACCO can request the correct number of DMA-cycles
after a XDD/XTF- or XDD-command.
RBC6
XBC6
H
H
0
H
RBC5
XBC5
0
RBC4
XBC4
OV
5-84
RBC11
RBC3
XBC3
RBC10
RBC2
XBC2
Description of Registers
RBC1
RBC9
XBC1
PEB 20560
bit 0
bit 0
bit 0
RBC0
RBC8
XBC0
2003-08