peb20560 Infineon Technologies Corporation, peb20560 Datasheet - Page 49
peb20560
Manufacturer Part Number
peb20560
Description
Dsp Oriented Pbx Controller Doc
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEB20560.pdf
(433 pages)
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When
Table 2-3 Behavior of the Reset Logic in the Case of Voltage Drop
V
> 3 V
< 1 V
1 V ≤
Note: The power-up reset generator must not be used as a supply voltage control
2.1.2.3
2.1.2.3.1
The PCM-interface formats the data transmitted or received at the PCM-highways. It can
be configured as one (max. 8.192 Mbit/s), two (max. 4.096 Mbit/s) or four (max.
2.048 Mbit/s) PCM-ports, consisting each of a data receive (RxD#), a data transmit
(TxD#) and an output tri-state indication line (TSC#).
Port configuration, data rates, clock shift and sampling conditions are programmable.
The newly implemented PCM-mode 3 is similar to mode 1 (two PCM-highways). Unlike
mode 1 the pins TxD1, TxD3 are not tri-stated but drive the inverted values of TxD0,
TxD2.
2.1.2.3.2
In order to optimize the on-board interchip communication, a very flexible serial interface
is available. It formats the data transmitted or received at the DDn-, DUn- or SIPn-lines.
Although it is typically used in IOM-2 or SLD-configuration to connect layer-1 devices,
application specific frame structures can be defined (e.g. to interface ADPCM-converters
or maintenance blocks).
2.1.2.3.3
The memory block of the EPIC-1 performs the switching functionality.
It consists of four sub blocks:
– Upstream data memory
– Downstream data memory
– Upstream control memory
– Downstream control memory
Semiconductor Group
DD
V
element.
V
DD
DD
≤3 V
drops under normal operation the reset logic has the following behavior:
EPIC
PCM-Interface
Configurable Interface
Memory Structure and Switching
®
-1
Behavior
No internal reset, no RESIN
Internal reset and RESIN after
Not defined
2-3
Functional Block Description
V
DD
goes up again
PEB 20560
2003-08
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