peb20560 Infineon Technologies Corporation, peb20560 Datasheet - Page 267

• Manufacturer Part Number: peb20560
• Description: Dsp Oriented Pbx Controller Doc
• Manufacturer: Infineon Technologies Corporation

Semiconductor Group
WTC1…2 Watchdog Timer Control.
5.1.1.3
Access: read/write
Reset value: XF
ECMD2
bit 7
ELIC
Once the watchdog timer has been started WTC1, WTC2 have to be written
once every 1024 PFS-cycles in the following sequence in order to prevent
the watchdog expiring.
WTC1
1) 1 0
2) 0 1
The minimum required interval between the two write accesses is 2
PDC-periods.
ELIC CFI-Mode Bit 2.
If set to ‘0’, the CFI-mode 0 with a 2.048-Mbit/s data rate can be used with a
2.048-MHz PDC-input clock.
This mode requires further restrictions of the current ELIC-specification:
1) EPIC-1 PMOD:PCR must be set to ‘1’.
Note: Although the PCM clock PDC is set to double clock rate by this bit, the
2) EPIC-1 CMD2:COC must be programmed to ‘0’, i.e. it is not possible to
3) EPIC-1 CMD1:CSS must be programmed to ‘0’, i.e. it is not possible to
4) The timing of the PCM-interface is expanded:
Table 5-28
Parameter
Clock period
Clock period low
Clock period high
output a DCL-clock with a frequency of twice the CFI-data rate.
select DCL as clock and FSC as framing signal source for the
configurable interface.
H
“don’t care”
®
Mode Register
data rate must always be equal to the clock rate.
WTC2
T
T
T
Symbol
CP
CPL
CPH
5-24
min.
480
200
200
Values
Limit
1
max.
–
–
–
Unit Test Condition
ns
ns
ns
1
Description of Registers
EMOD:ECMD2 = ‘0’
ECMD2
PEB 20560
bit 0
2003-08
1