peb20560 Infineon Technologies Corporation, peb20560 Datasheet - Page 297

• Manufacturer Part Number: peb20560
• Description: Dsp Oriented Pbx Controller Doc
• Manufacturer: Infineon Technologies Corporation

Semiconductor Group
5.1.1.4.32 Operation Mode Register (OMDR)
Access: read/write
Reset value: 00
OMS1…01 Operational Mode Selection; these bits determine the operation mode of the
bit 7
OMS1
EPIC-1 is working in according to the following table:
Table 5-45
OMS1…0
00
10
11
01
OMS0
H
Function
The CM-reset mode is used to reset all locations of the control
memory code and data fields with a single command within
only 256 RCL-cycles. A typical application is resetting the CM
with the command MACR = 70
MADR (xx
(unassigned channel) to all code field locations. A CM-reset
should be made after each hardware reset. In the CM-reset
mode the EPIC-1 does not operate normally i.e. the CFI- and
PCM-interfaces are not operational.
The CM-initialization mode allows fast programming of the
control memory since each memory access takes a maximum
of only 2.5 RCL-cycles compared to the 9.5 RCL-cycles in the
normal mode. Accesses are performed on individual
addresses specified by MAAR. The initialization of
control/signaling channels in IOM- applications can for
example be carried out in this mode. In the CM- initialization
mode the EPIC-1 does also not work normally.
In the normal operation mode the CFI- and PCM-interfaces
are operational. Memory accesses performed on single
addresses (specified by MAAR) take 9.5 RCL-cycles. An
initialization of the complete data memory tri-state field takes
1035 RCL-cycles.
In test mode the EPIC-1 sustains normal operation. However
memory accesses are no longer performed on a specific
address defined by MAAR, but on all locations of the selected
memory, the contents of MAAR (including the U/D-bit!) being
ignored. A test mode access takes 2057 RCL-cycles.
PSB
H
PTL
) to all data field locations and the code ‘0000’
5-54
0 or 1
H
MFPS
which writes the contents of
Description of Registers
CSB
PEB 20560
bit 0
RBS
2003-08