peb20560 Infineon Technologies Corporation, peb20560 Datasheet - Page 55

• Manufacturer Part Number: peb20560
• Description: Dsp Oriented Pbx Controller Doc
• Manufacturer: Infineon Technologies Corporation

Figure 2-6
Generally it is the responsibility of the DMA-controller to perform the correct bus cycles
as long as a request line is active.
For further information refer to chapter 3.1.4.2 (Data Transmission in DMA-Mode) and
chapter 3.1.4.4 (Data Reception in DMA-Mode).
Figure 2-7
If a pulsed DACK-signal is used the DRQR/DRQT-signal will be deactivated with the
rising edge of RD/WR-operation (n −1) but activated again with the following rising edge
of DACK. With the next falling edge of DACK (DACK ‘n’) it will be deactivated again (see
Figure 2-7).
This behavior might cause a short negative pulse on the DRQR/DRQT-line depending
on the timing of DACK vs. RD/WR.
Semiconductor Group
DRQR / DRQT
DACK
WR / RD
Timing Diagram for DMA-Transfers (slow or fast) Receive
(n = 4, 8 or 16)
DMA-Transfers with Pulsed DACK (read or write)
DRQR
RD
CSS,
DACK
Cycle
n-2
n-2
n-1
2-9
n
n-1
Functional Block Description
n
ITD05829
ITD06896
PEB 20560
2003-08