peb20560 Infineon Technologies Corporation, peb20560 Datasheet - Page 281
peb20560
Manufacturer Part Number
peb20560
Description
Dsp Oriented Pbx Controller Doc
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEB20560.pdf
(433 pages)
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Semiconductor Group
Note: In CFI-mode 1: SC21 = SC01; SC20 = SC00; SC31 = SC11; SC30 = SC10
5.1.1.4.13 Memory Access Control Register (MACR)
Access: read/write
Reset value: xx
With the MACR the µP selects the type of memory (CM or DM), the type of field (data or
code) and the access mode (read or write) of the register access. When writing to the
control memory code field, MACR also contain the 4 bit code (CMC3..0) defining the
function of the addressed CFI time-slot.
RWS
MOC3…0 Memory Operation Code.
CMC3…0 Control Memory Code.
Note: Prior to a new access to any memory location (i.e. writing to MACR) the
bit 7
RWS
In CFI-mode 2: SC31 = SC21 = SC11 = SC01; SC30 = SC20 = SC10 = SC00
STAR:MAC bit must be polled for ‘0’.
Table 5-37
SC#1
0
0
1
1
Read/Write Select.
0…write operation on control or data memories
1…read operation on control or data memories
These bits determine the type and destination of the memory operation as
shown below.
MOC3
H
SC#0
0
1
0
1
MOC2
64 kbit/s
7…0
7…0
7…0
7…0
MOC1
Bit Positions for CFI Subchannels
5-38
MOC0
CMC3
having a Bandwidth of
32 kbit/s
7…4
3…0
7…4
3…0
CMC2
Description of Registers
CMC1
16 kbit/s
7…6
5…4
3…2
1…0
PEB 20560
bit 0
CMC0
2003-08
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