peb20560 Infineon Technologies Corporation, peb20560 Datasheet - Page 148

• Manufacturer Part Number: peb20560
• Description: Dsp Oriented Pbx Controller Doc
• Manufacturer: Infineon Technologies Corporation

Semiconductor Group
Table 2-23 Specification of the Time-Slot Quadruplet Controlled by Each Bit in
UISBPER Bit
ISBPE4
ISBPE5
ISBPE6
ISBPE7
ISBPE8
ISBPE9
ISBPE10
ISBPE11
ISBPE12
ISBPE13
ISBPE14
ISBPE15
After reset all bits of UISBPER are ‘0’.
Setting Resetting and Reading UISBPER
UISBPER has a special method of setting and resetting its bits. Both UISBPER reset
instructions and UISBPER set instructions are implemented by the DSP write instruction
of a word that indicates the bits that should be set when it is a UISBPER set instruction,
and which bits should be reset when it is a UISBPER reset instruction. The only
difference between the set instruction and the reset instruction is the address that this
word is being written to:
• For a set instruction the address of the DSP write instruction should be 0xC102
• For a reset instruction the address of the DSP write instruction should be 0xC103.
Written word values are such that:
• Every ‘1’ in the written word indicates that the compatible bit in UISBPER should be
• Every ‘0’ in the written word indicates that the compatible bit in UISBPER should not
Note: The term “compatible bit” means that bit0 (lsb) of the written word determines if bit
set or reset, depending on the address
be changed.
ISBPE0 of UISBPER will be set/reset or unchanged; bit1 determines ISBPE1 and
so on.
UISBPER, in the Different Work Modes of the PEDIU (cont’d)
Input Stream
IN0
IN0
IN0
IN0
IN1
IN1
IN1
IN1
IN1
IN1
IN1
IN1
Mode 0/1/2
Time-Slots
16-19
20-23
24-27
28-31
0-3
4-7
8-11
12-15
16-19
20-23
24-27
28-31
2-102
Input Stream
IN0
IN0
IN0
IN0
IN0
IN0
IN0
IN0
IN0
IN0
IN0
IN0
Functional Block Description
Mode 3/4
Time-Slots
16-19
20-23
24-27
28-31
32-35
36-39
40-43
44-47
48-51
52-55
56-59
60-63
PEB 20560
2003-08