peb20560 Infineon Technologies Corporation, peb20560 Datasheet - Page 164

no-image

peb20560

Manufacturer Part Number
peb20560
Description
Dsp Oriented Pbx Controller Doc
Manufacturer
Infineon Technologies Corporation
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
peb20560HV3.1
Manufacturer:
INF
Quantity:
5 510
Part Number:
peb20560HV3.1
Manufacturer:
STK
Quantity:
5 510
Part Number:
peb20560V2.1
Manufacturer:
INFINEON
Quantity:
3 900
Part Number:
peb20560V2.1-33D0C
Manufacturer:
SIEMENS
Quantity:
5 510
Part Number:
peb20560V2.1-33D0C
Manufacturer:
MOT
Quantity:
5 510
Semiconductor Group
OAK reads of address C051
bit
OBUSYR
Note: The OBUSY bit is set only 4 DSP cycles after a OAK write operation to OCMD
µP read of address 341
bit
MBUSYR
2.11
The System Data Interface is a passive interface adaptable to different Microprocessor
bus schemes:
• 8-bit data bus multiplexed with lower 8 bits of the address bus
• Upper address bus for an access to all accessible DOC registers.
• Control lines
2.11.1
The bus is compatible to the following types of µPs:
• Siemens C16x
• Intel 80x86/88 or
Note: In 32-bit µP systems (e.g. based on i80386, M68xxx or MIPC R3000), an external
2.11.2
The DOC is a slave to the Microprocessor. The µP can access all DOC registers but the
DSP memory, the DSP registers, the DSP memory mapped registers and the PEDIU.
The µP can communicate with the DSP via the µP Mailbox only. For more details see
register overview, section 5.1.
register. Therefore, the first polling-read cycle of OBUSYR should take place at
least 5 DSP clock cycles after the write cycle to OCMD.
logic for control signals generation is necessary (e.g. sequencer PALs).
µP Interface
Compatibility
Memory and I/O Organization
15
OBUSY
7
MBUSY
14 13 12 11 10 9
H
0
6
will result with:
0
H
0
will therefore result with:
0
5
0
0
2-118
0
4
0
0
8
0
3
7
0
0
Functional Block Description
6
0
2
5
0
0
4
0
1
3
0
0
PEB 20560
2
0
0
1
2003-08
0
0
0
0

Related parts for peb20560