peb20560 Infineon Technologies Corporation, peb20560 Datasheet - Page 274

• Manufacturer Part Number: peb20560
• Description: Dsp Oriented Pbx Controller Doc
• Manufacturer: Infineon Technologies Corporation

Note: Both ELICs must be programmed in the same way.
CSM
Note: If CSS = 0 is selected, CSM and PMOD:PSM must be programmed identical.
CSP1…0
CMD1…0 CFI-Mode1,0.
Semiconductor Group
and framing signals derived from these sources are output on DCL and FSC.
1…DCL and FSC are selected as clock and framing source for the CFI. If
EMOD:ECMD2 is set to ‘0’, then CSS has to be set to ‘0’ (see
chapter 5.1.1.3).
CFI-Synchronization Mode.
The rising FSC-edge synchronizes the CFI-frame.
0…FSC is evaluated with every falling edge of DCL.
1…FSC is evaluated with every rising edge of DCL.
Clock Source Prescaler 1,0.
The clock source frequency is divided according to the following table to
obtain the CFI-reference clock CRCL.
Table 5-32
CSP1,0
00
01
10
11
Defines the actual number and configuration of the CFI-ports.
Table 5-33
CMD
1…0
00
01
10
CFI-
Mode
0
1
2
Number
of
Logical
Ports
4 DU
(0…3)
2 DU
(0…1)
1 DU
min.
128
128
128
CFI-Data
[Mbit/s]
Rate
5-31
max.
2048
4096
8192
Prescaler Divisor
2
1.5
1
not allowed
Min.
Required
CFI-Data
Rate
[kbit/s]
Relative
to
PCM-Data
Rate
32N/3
64N/3
64N/3
Description of Registers
Necessary
Reference
Clock
(RCL)
2xDR
DR
0.5xDR
PEB 20560
DCL-Output
Frequencies
CMD1:
CSS0 = 0
DR, 2xDR
DR
DR
2003-08
1)