peb20560 Infineon Technologies Corporation, peb20560 Datasheet - Page 268

• Manufacturer Part Number: peb20560
• Description: Dsp Oriented Pbx Controller Doc
• Manufacturer: Infineon Technologies Corporation

Figure 5-1
Semiconductor Group
5) PCSR:DRE has to be set to ‘1’.
6) PMOD:PSM has to be set to ‘1’.
Timing Relation Between Internal and External Clock
PCSR:URE has to be set to ‘1’.
When provided with a 2 MHz PDC, the ELIC internally generates a
4 MHz clock.
Since the clock shift capabilities (provided by register bits PCSR:DRCS
and PCSR:ADSR0) apply to the internal 4 MHz clock, the frame can thus
be shifted with a resolution of a half bit.
The frame signal PFS must always be sampled with the rising edge of
PDC. The set-up and hold times of PFS are still valid respected to
external PDC.
4 MHz Clock
2 MHz PDC
Internal
EPIC
Core
R
ELIC
4 MHz
R
5-25
x2
RxD#, TxD# (2 Mbit/s)
PDC = 2 MHz
Description of Registers
ITS06897
PEB 20560
2003-08