tmp19a43fzxbg TOSHIBA Semiconductor CORPORATION, tmp19a43fzxbg Datasheet - Page 20

• Manufacturer Part Number: tmp19a43fzxbg
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Note 1: When using the clock gear to reduce the system clock frequency, make sure that φTn of the
XT1
XT2
X1
X2
prescaler output for each peripheral I/O block satisfies the following relationship:
To this end, set the clock-related registers so that φTn is slower than fsys/2.
When selecting a low-speed system clock (fs), only the timer for real-time clock, 2-phase pulse input
counter, and dynamic pull-up can operate.
fperiph
SYSCR0
SYSCR0
φTn<fsys/2
Low-speed
High-speed
<XTEN>
fs
fsys
<XEN>
3.
oscillator
oscillator
Block diagram
Figure 3.3.3 Block Diagram of Dual-Clock and Standby Functions
fosc
SYSCR1 <DFOSC>
fs
SYSCR2<WUPT1 : 0>
PLL
÷ 2
SYSCR3<LUPTM>
Lock-up (PLL) timer
÷ 2
SYSCR0<WUEF>
Fpll = fosch × 4
Warm-up timer
÷ 4
<PRCK1:0>
SYSCR0
TMP1942CY/CZ-19
SYSCR3 <SCOSEL>
Selector
PLLOFF (default pin setting)
(prescaler input)
Peripheral I/O
TMRA/B, SIO
fc
SBI, ADC
2-phase pulse input counter
÷ 2
Timer for real-time clock
÷ 4
KWUP
÷ 8
SYSCR1 <GEAR1:0>
Divide by 8 after reset
DMAC
INTC
ROM
RAM
CPU
TMP1942CY/CZ
fgear
÷ 2
SCOUT
SYSCR1 <FPSEL>
SYSCR1 <SYSCK>
Peripheral I/O
ADC,DA,TMRA/B,
SIO,SBI,PIO, WDT, RTC
fperiph
(to peripheral I/O)
fs
fsys