tmp19a43fzxbg TOSHIBA Semiconductor CORPORATION, tmp19a43fzxbg Datasheet - Page 395

• Manufacturer Part Number: tmp19a43fzxbg
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

6.4 Instructions for JTAG
6.4.1
This section defines the instructions supplied and the operations that occur in response to those instructions.
The EXTEST Instruction
TDI and TDO. The EXTEST instruction permits BSR cells at output pins to shift out test patterns in the
Update-DR state and those at input pins to capture test results in the Capture-DR state.
register using the SAMPLE/PRELOAD instruction. In the Update-DR state, the boundary scan register
loaded with the initialization pattern causes known data to be driven immediately from the IC onto its
external interconnects. This eliminates the possibility of bus conflicts damaging the IC outputs. The flow
of data through the boundary scan register while the EXTEST instruction is selected is shown in Figure
6.4.1, which follows:
This instruction is used for external interconnect test, and targets the boundary scan register between
Typically, before EXTEST is executed, the initialization pattern is first shifted into the boundary scan
The following steps describe the basic test algorithm of an external interconnect test.
Steps 6 to 8 are repeated for each test pattern.
INPUT
Figure 6.4.1 Test Data Flow While the EXTEST Instruction is Selected
1. Initialize the TAP controller to the Test-Logic-Reset state.
2. Load the instruction register with SAMPLE/PRELOAD. This causes the boundary scan
3. Initialize the boundary scan register by shifting in determinate data.
4. Then, load the initial test data into the boundary scan register.
5. Load the instruction register with EXTEST.
6. Capture the data applied to the input pin into the boundary scan register.
7. Shift out the captured data while simultaneously shifting in the next test pattern.
8. Read out the data in the boundary scan register onto the output pin.
TDI
register to be connected between TDI and TDO.
TMP1942CY/CZ-394
Boundary Scan Path
Core Logic
TMP1942CY/CZ
OUTPUT
TDO