tmp19a43fzxbg TOSHIBA Semiconductor CORPORATION, tmp19a43fzxbg Datasheet - Page 276

• Manufacturer Part Number: tmp19a43fzxbg
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

(INTRX0 interrupt request)
Timing at which received
data is written to buffer
Timing at which transmit
data is written to buffer
SCLK0 output
TXD0
RXD0
(INTTX0 interrupt request)
(INTRX0 interrupt request)
Timing at which received
data is written to buffer
Timing at which transmit
data is written to buffer
SCLK0 output
TXD0
RXD0
(INTTX0 interrupt request)
Timing at which received
data is written to buffer
Timing at which transmit
data is written to buffer
SCLK0 output
TXD0
RXD0
(INTTX0 interrupt request)
(INTRX0 interrupt request)
Figure 3.11.40 Transmit/Receive Operation in I/O Interface Mode (SCLK0 Output Mode)
to the transmit buffer initiates SCLK output and shifts the received 8-bit data into receive
buffer 1, which is then transferred to receive buffer 2, generating a receive interrupt (INTRX0).
Simultaneously, the 8-bit data written to the transmit buffer is output on the TXD0 pin. When
all bits of data have been transmitted, a transmit interrupt (INTTX0) is generated and the next
data is transferred from transmit buffer 2 to transmit buffer 1. If transmit buffer 2 does not
contain data to be transferred (TBEMP = 1) or receive buffer 2 contains data (RBFLL = 1),
SCLK output is stopped. When the CPU subsequently reads the receive buffer and writes data
to the transmit buffer, SCLK output is restarted and next transmission/reception starts.
If WBUF = 1, that is, both the transmit and receive double-buffers are enabled, writing data
bit 0
bit 0
bit 0
bit 0
bit 0
bit 0
bit 1
bit 1
bit 1
bit 1
bit 1
bit 1
TMP1942CY/CZ-275
When WBUF = 1
When WBUF = 0
When WBUF = 1
bit 5
bit 5
bit 5
bit 5
bit 5
bit 5
bit 6
bit 6
bit 6
bit 6
bit 6
bit 6
bit 7
bit 7
bit 7
bit 7
bit 7
bit 7
TMP1942CY/CZ
bit 0
bit 0
bit 0
bit 0
bit 1
bit 1
bit 1
bit 1