tmp19a43fzxbg TOSHIBA Semiconductor CORPORATION, tmp19a43fzxbg Datasheet - Page 326
tmp19a43fzxbg
Manufacturer Part Number
tmp19a43fzxbg
Description
32bit Tx System Risc
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP19A43FZXBG.pdf
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(d) Channel scan repeated conversion mode
(4-2) Highest-priority A/D conversion
regardless of the settings of ADMOD0<REPEAT:SCAN>. When the start condition is satisfied,
conversion for the channel specified with ADMOD2<HPADCH3:HPADCH0> is performed once.
After the conversion has been completed, a highest-priority A/D conversion completed interrupt
will be generated, ADMOD2<EOCFHP> set to 1 and <ADBFHP> cleared to 0. The EOCFHP flag
can be cleared to 0 by reading it.
conversion session completed. In that case, the conversion results are stored sequentially in
registers ADREG08 through ADREG3B. EOCF becomes 1 once the conversion result has been
stored in ADREG3B. The next conversion result will be stored in ADREG08 again. EOCF can be
cleared to 0 by reading it.
conversion session completed. In that case, the conversion results are stored sequentially in
registers ADREG08 through ADREG7F. EOCF becomes 1 once the conversion result has been
stored in ADREG7F. The next conversion result will be stored in ADREG08 again. EOCF can be
cleared to 0 by reading it.
ITM1:ITM0 = 00, this bit controls the interval between a single conversion being completed and
the next conversion being started. If ITM1:ITM0 = 01, the bit controls the interval between four
conversions being completed and the next conversion being started. If ITM1:ITM0 = 10, the bit
controls the interval between eight conversions being completed and the next conversion being
started.
11.
scan conversion operation has been completed, ADMOD0<EOCF> will be set to 1, thereby
generating an INTAD interrupt request. ADMOD0<ADBF> remains at 1 and is not cleared to 0.
EOCF can be cleared to 0 by reading it.
ADMOD0<REPEAT>. Repeat conversion mode will then be terminated and ADMOD0<ADBF>
cleared to 0 as soon as the conversion currently in progress has been completed.
the A/D converter will immediately stop operating, even if A/D conversion is in progress. After the
device has exited the standby state, if the A/D converter is operating in repeat conversion mode
(mode (c) or (d) ), A/D conversion will start again from the beginning (the register settings remain
the same, status information is initialized and operation is restarted from the beginning); however,
if the A/D converter is operating in single conversion mode (mode (a) or (b) ), it will not restart
conversion operation (it will remain stopped).
Highest-priority A/D conversion is only performed in channel-fixed single conversion mode,
The setting of ADMOD0<RI> determines the repeat interval for repeated conversion mode. If
Channel scan repeated conversion mode is selected by setting ADMOD0<REPEAT:SCAN> to
In this mode, conversion is performed repeatedly for selected scanned channels. Each time one
To stop operation in repeat conversion mode (mode (c) or (d) ), write a 0 to
If ADMOD1<I2AD> = 0 and the device enters a standby state (IDLE, SLEEP or STOP mode),
If ADMOD0<ITM1:ITM0> = 01, an interrupt request will be generated for every fourth A/D
If ADMOD0<ITM1:ITM0> = 10, an interrupt request will be generated for every eighth A/D
TMP1942CY/CZ-325
TMP1942CY/CZ
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