tmp19a43fzxbg TOSHIBA Semiconductor CORPORATION, tmp19a43fzxbg Datasheet - Page 278

• Manufacturer Part Number: tmp19a43fzxbg
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Timing at which received
data is written to buffer
Timing at which transmit
data is written to buffer
SCLK0 input
TXD0
RXD0
(INTTX0 interrupt request)
(INTRX0 interrupt request)
Timing at which received
data is written to buffer
Timing at which transmit
data is written to buffer
SCLK0 input
TXD0
RXD0
(INTTX0 interrupt request)
(INTRX0 interrupt request)
PERR (underrun error)
(2) Mode 1 (7-bit UART mode)
device into 7-bit UART mode.
serial channel control register SC0CR. When PE = 1 (parity enabled), even or odd parity can be
selected using SC0CR<EVEN>. The STOP bit length can also be specified using
SCnMOD2<SBLEN>.
Setting the SM1 and SM0 bits of the serial channel mode register SC0MOD to 01 places the
In this mode, a parity bit can be used. Parity can be enabled or disabled using the PE bit of the
bit 0
bit 0
bit 0
bit 0
When WBUF = 1 (if error occurs)
When WBUF = 1 (without error)
bit 1
bit 1
bit 1
bit 1
TMP1942CY/CZ-277
bit 5
bit 5
bit 5
bit 5
bit 6
bit 6
bit 6
bit 6
bit 7
bit 7
bit 7
bit 7
TMP1942CY/CZ
bit 0
bit 0
bit 0
bit 0
bit 1
bit 1
bit 1
bit 1