tmp19a43fzxbg TOSHIBA Semiconductor CORPORATION, tmp19a43fzxbg Datasheet - Page 41

• Manufacturer Part Number: tmp19a43fzxbg
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

3.4.1
Interrupt sources
(1) Reset and non-maskable interrupts: RESET , NMI and INTWDT (watchdog timer interrupt)
(2) Maskable interrupts: Software and hardware interrupts
Vector address: 0xBFC0_0000 (virtual address)
Vector addresses: 0xBFC0_0210 (virtual address) to 0xBFC0_0260 (virtual address)
Note 1: When vector addresses are located in the on-chip ROM, set the BEV bit in the
Note 2: Maskable software interrupts are generated by setting <Sw3:Sw0> in CP0
Reset
Non-maskable
Software Swi0
Hardware
Interrupt Source
system control coprocessor (CP0) Status register to 1.
Cause register. Do not confuse these software interrupts with Software Set,
which is one of the hardware interrupt sources. The Software Set interrupt is
generated by setting <IL02:IL00> in the interrupt controller (INTC) IMC0 register
to any value other than 0.
Swi1
Swi2
Swi3
TMP1942CY/CZ-40
0xBFC0_0000
0xBFC0_0210
0xBFC0_0220
0xBFC0_0230
0xBFC0_0240
0xBFC0_0260
Vector Address (virtual address)
TMP1942CY/CZ