tmp19a43fzxbg TOSHIBA Semiconductor CORPORATION, tmp19a43fzxbg Datasheet - Page 236
tmp19a43fzxbg
Manufacturer Part Number
tmp19a43fzxbg
Description
32bit Tx System Risc
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP19A43FZXBG.pdf
(406 pages)
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TB2ST
(0xFFFF_
F164)
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Setting the up/down-counter
TB2RUN register (TB2UDCE) to determine whether the counter should operate as a up/down
counter or as an ordinary up-counter based on external clock input.
c. Interrupts
•
•
•
Double
Buffer
0: Disable
1: Enable
Set TB2MOD<TB2CLK0,TB2CLK1> to “00” (prescaler disabled). Next, set bit 4 of the
TB2RDE
TB2UDCE (up/down-counter enable) = 0: Normal 16-bit timer operation
R/W
In up/down-counter mode, ordinary INTB to INTE interrupts (interrupts other than those used
to terminate STOP/SLEEP mode) cannot be used.
The input clock signals are sampled at fs (32 kHz) or based on the high-speed clock (system
clock). When fs is used, the maximum input frequency is 8 kHz. When the high-speed clock is
used, the maximum input frequency is fsys/8 Hz.
In NORMAL or SLOW mode
occur when the counter either counts up or down. You can determine whether an overflow or
underflow has occurred at the same time by reading the status register TB2ST during the
handling of the interrupt. An overflow has occurred if TB2ST<INTTBOVF2> = 1. An
underflow has occurred if TB2ST<INTTBUDF2> = 1. This register is cleared when read. An
overflow causes the counter to be initialized to 0x0000 and an underflow causes the counter to
be initialized to 0xFFFF, allowing the counter to continue counting.
7
0
⎯
⎯
⎯
7
Figure 3.10.41 Register for Setting the Up/Down-Counter
Enable INTTB2 interrupts in the interrupt controller (INTC). An INTTB2 interrupt will
⎯
⎯
⎯
6
Figure 3.10.42 TMRB2 Status Register
⎯
⎯
⎯
6
TMRB2 run register (TB2RUN)
Sampling
clock
selection
0: fs
1: fsys/2
UD2CK
TMP1942CY/CZ-235
R/W
5
0
⎯
⎯
⎯
5
2-phase
counter
enable
0: Disable
1: Enable
TB2UDCE
Up or down
count
0: Not
1: Detected
INTTBUD2
detected
R/W
4
0
4
0
1: Up/down-counter operation
IDLE
0: Idle
1: Operate
INTTBUDF2 INTTBOUF2
Underflow
0: Not
1: Detected
I2TB2
detected
R/W
3
0
R
3
0
Timer Run/Stop Control
0: Stop and cleared
1: Count
TB2PRUN
Overflow
0: Not
1: Detected
detected
R/W
2
0
2
0
TX1942CY/CZ
⎯
⎯
⎯
1
⎯
⎯
⎯
1
TB2RUN
R/W
0
0
⎯
⎯
⎯
0
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