tmp19a43fzxbg TOSHIBA Semiconductor CORPORATION, tmp19a43fzxbg Datasheet - Page 231

• Manufacturer Part Number: tmp19a43fzxbg
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Figure 3.10.34 One-Shot Pulse Output Using an External Trigger Pulse (without Delay)
Count clock
(TB0IN0 pin input)
TA1OUT
Latched into TB0CP0
Latched into TB0CP1
INTTA0/INTTA1
Count clock
(prescaler output clock)
TB0IN0 pin input
(external trigger pulse)
TB0RG1 and UC0 match
TB0OUT timer output pin
Inversion by latch into
TB0CP0 remains enabled
b. Frequency measurement
external clock.
timers (TMRA01). (TMRA01 determines the measurement time by inverting TA1FF.)
with the external clock pulses. Set TB0MOD<TB0CPM1:TB0CPM0> to 11. This setting
causes the count value of the 16-bit up-counter UC0 to be latched into the capture register
TB0CP0 when the 8-bit timer (TMRA01) flip-flop (TA1FF) output goes High, and to be
latched into the capture register TB0CP1 when the TA1FF output goes Low.
TB0CP1 based on the measurement time determined by an 8-bit timer interrupt INTTA0 or
INTTA1.
between TB0CP0 and TB0CP1 is 100, then the frequency is 100/0.5 s = 200 Hz.
With its capture function enabled, the timer can be used to measure the frequency of an
The frequency is measured using a combination of a 16-bit timer/event counter and 8-bit
Select TB0IN0 pin input as the count clock for TMRB0 so that it counts up synchronously
The frequency is calculated from the difference between the loaded values in TB0CP0 and
For example, if the 8-bit timers set the High level width of TA1FF to 0.5 s and the difference
Figure 3.10.35 Frequency Measurement
C1
C1
c
TMP1942CY/CZ-230
INT5 generated
Latched into capture register TB0CP0
Pulse width
Inversion
enabled
(p)
C + p
C2
INTTB01 generated
C2
TB0FF0 left disabled so that it will not be
inverted by latch into TB0CP1
Latched into capture
register TB0CP1
TX1942CY/CZ
C1
C2