tmp19a43fzxbg TOSHIBA Semiconductor CORPORATION, tmp19a43fzxbg Datasheet - Page 49

• Manufacturer Part Number: tmp19a43fzxbg
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

IMC2
(0xFFFF_E008)
Note : Before enabling the above interrupt requests, be sure to set their active state.
Bit Symbol
Read/Write
After reset
Function
Bit Symbol
Read/Write
After reset
Function
Bit Symbol
Read/Write
After reset
Function
Bit Symbol
Read/Write
After reset
Function
15
23
31
7
14
22
30
6
0
TMP1942CY/CZ-48
Sets the active state of
the interrupt request.
00: Low level
01: High level
10: Falling edge
11: Rising edge
Sets the active state of
the interrupt request.
00: Low level
01: High level
10: Falling edge
11: Rising edge
Must be set to 00.
Must be set to 00.
EIMA1
EIMB1
EIM81
EIM91
13
21
29
5
0
0
0
0
EIMA0
EIMB0
EIM80
EIM90
12
20
28
4
0
0
0
0
Sets
whether or
not to
activate the
DMAC.
0: Not set.
1: Set
Sets
whether or
not to
activate the
DMAC.
0: Not set.
1: Set
Must be
set to 0.
Must be
set to 0.
interrupt
number 10
to activate
the DMAC.
interrupt
number 11
to activate
the DMAC.
DM8
DM9
DMA
DMB
19
27
11
3
0
0
0
0
R/W
R/W
R/W
R/W
Sets the priority level for interrupt
number 10 (INT5) when
DMA = 0.
Selects a DMAC channel when
DMA = 1.
Sets the priority level for interrupt
number 11 (INT6) when
DMB = 0.
Selects a DMAC channel when
DMB = 1.
Must be set to 000.
Must be set to 000.
TMP1942CY/CZ
ILA2
ILB2
IL82
IL92
2
000: Disable interrupt.
001-111: 1 to 7
000-011: 0 to 3
100-111: Invalid settings
000: Disable interrupt.
001-111: 1 to 7
000-011: 0 to 3
100-111: Invalid settings
0
0
0
0
10
18
26
ILA1
ILB1
IL81
IL91
17
25
1
9
0
0
0
0
ILA0
ILB0
IL80
IL90
16
24
0
8
0
0
0
0