PC87307VUL National Semiconductor, PC87307VUL Datasheet - Page 157

• Manufacturer Part Number: PC87307VUL
• Description: PC87307/PC97307 Plug and Play Compatible and PC97 Compliant SuperI/O
• Manufacturer: National Semiconductor

7.13.2 Shadow of Link Control Register (SH_LCR),
This register returns the value of the LCR register. The LCR
register is written into when a byte value according to Table
7-9 on page 147, is written to the LCR/BSR registers loca-
tion (at offset 03h) from any bank.
See “Link Control Register (LCR), All Banks, Offset 03h” on
page 146 for bit descriptions.
7.13.3 Shadow of FIFO Control Register (SH_FCR),
This read-only register returns the contents of the FCR reg-
ister in bank 0.
See “FIFO Control Register (FCR), Bank 0, Offset 02h” on
page 145 for bit descriptions.
7.13.4 Link Control Register (LCR) and Bank Select
These registers are the same as the registers at offset 03h
in bank 0.
0
0
7
7
RXFTH1
0
0
6
6
BKSE
FIGURE 7-29. SH_LCR Register Bitmap
FIGURE 7-30. SH_LCR Register Bitmap
Bank 3, Offset 01h
Bank 3, Offset 02h
Register (BSR), Bank 3, Offset 03h
SBRK
RXFTH0
0
0
5
5
TXFHT1
0
0
4
4
STKP
EPS
TXFTH0
0
0
3
3
Reserved
PEN
0
0
2
2
TXSR
STB
0
0
1
1
RXSR
WLS1
0
0
0
0
Reset
Required
Reset
Required
FIFO_EN
UART1 and UART2 (with IR) (Logical Devices 5 and 6)
WLS0
FIFO Control Register
Link Control Register
Shadow of
Shadow of
Offset 01h
Offset 02h
(SH_LCR)
(SH_FCR)
Bank 3,
Bank 3,
157
7.14 BANK 4 – IR MODE SETUP REGISTER
7.14.1 Reserved Registers, Bank 4, Offsets 00h and
These registers are reserved.
7.14.2 Infrared Control Register 1 (IRCR1),
Enables the Sharp-IR or SIR infrared mode in the Non-Ex-
tended mode of operation.
Upon reset, all bits are set to 0.
Bits 1,0 - Reserved
Bits 3,2 - Sharp-IR or SIR Mode Select (IR_SL1,0), Non-
Extended Mode Only
00-01h
04-07h
Offset
0
0
7
02h
03h
Read/Write 0.
These bits enable Sharp-IR and SIR modes in Non-Ex-
tended mode. They allow selection of the appropriate in-
frared interface when Extended mode is not selected.
These bits are ignored when Extended mode is select-
ed. Before running the legacy application in Sharp-IR or
SIR Mode, run a small enabling routine to set bits 3 and
2 to the appropriate mode, i.e., 10 or 11 (see Table
7-21). The infrared application can then be executed
and this module will be pre-set for the appropriate mode.
Upon termination of the application these bits should be
reset to 00 to switch back to a UART mode.
0
0
6
01h
Bank 4, Offset 02h
FIGURE 7-31. IRCR1 Register Bitmap
0
0
5
TABLE 7-20. Bank 4 Register Set
Reserved
Register
0
0
IRCR1
4
Name
LCR/
BSR
0
3
IR_SL1
0
2
IR_SL0
0
0
1
Reserved
Infrared Control Register 1
0
0
0
Reserved
Reserved
Infrared Control Register1
Bank Select Registers
Reserved
Reset
Required
Link Control/
Description
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Offset 02h
Bank 4,
(IRCR1)