PC87307VUL National Semiconductor, PC87307VUL Datasheet - Page 181

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PC87307VUL

Manufacturer Part Number
PC87307VUL
Description
PC87307/PC97307 Plug and Play Compatible and PC97 Compliant SuperI/O
Manufacturer
National Semiconductor
Datasheet
12.0 Interrupt and DMA Mapping
The standard Plug and Play Configuration registers map
IRQs and DMA channels for the part. See Tables 2-8 and
2-9 starting on page 29.
12.1 IRQ MAPPING
The part allows connection of some logical devices to the 13
IRQ signals.
The polarity of an IRQ signal is controlled by bit 1 of the In-
terrupt Type registers (index 71h) of each logical device.
The same bit also controls selection of push-pull or open-
drain IRQ output. High polarity implies push-pull output.
Low polarity implies open-drain output with strong pull-up
for a short time, followed by weak pull-up.
The IRQ input signals of the KBC or mouse, and of the par-
allel port are not affected by this bit, i.e., bit 1 at index 71h
of each logical device. This bit affects only the output buffer,
not the input buffer.
Only UART1 and UART2 may map more than one logical
device to any IRQ signal. Other devices may not do so.
An IRQ signal is in TRI-STATE when any of the following
conditions is true:
12.2 DMA MAPPING
Although the part allows some logical devices to be con-
nected to the four 8-bit DMA channels, it is illegal to map
two logical devices to the same pair of DMA signals.
A DRQ signal is in TRI-STATE and the DACK input signal
is blocked to 1 when any of the following conditions is true:
No logical device is mapped to the IRQ signal.
The logical device mapped to the IRQ signal is inactive.
The logical device mapped to the IRQ signal floats its
IRQ signal.
No logical device is mapped to the DMA channel.
The logical device mapped to the DMA channel is inac-
tive.
The logical device mapped to the DMA channel floats its
DRQ signal.
Interrupt and DMA Mapping
181
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