PC87307VUL National Semiconductor, PC87307VUL Datasheet - Page 49

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PC87307VUL

Manufacturer Part Number
PC87307VUL
Description
PC87307/PC97307 Plug and Play Compatible and PC97 Compliant SuperI/O
Manufacturer
National Semiconductor
Datasheet
4.0 Real-Time Clock (RTC) and
The RTC logical device contains two major functions: the
Real-Time Clock (RTC) and Advanced Power Control
(APC).
The RTC is a timekeeping module that supplies a time-of-
day clock and a multi-century calendar in various formats. It
provides alarm facilities and three programmable timer in-
terrupts. It continues valid timekeeping and maintains RAM
contents during power down by utilizing external battery
backup.
Additional features of the RTC include Advanced Power
Control (APC), a century timekeeping storage byte, full Plug
and Play support, additional battery-backed RAM and RAM
lock schemes, and additional power management options.
The APC function adds the ability of automatic PC system
power-up in response to external events. This enables effi-
cient use of the PC system in applications such as voice an-
swering machines or fax receivers, which are typically
powered up at all times.
The APC also enables a controlled power-down sequence
when switched off by the user. The APC function does not
replace the power management abilities of various mod-
ules it adds power management ability to the PC host sys-
tem.
RTC software is compatible with the DS1287 and
MC146818 clock chips. (The only difference is that Port 70
is read/write in this module, and is write-only in the DS1287
and MC146818.)
Battery-Backed Register Banks and RAM
The RTC and APC module has three battery-backed regis-
ter banks. Two are used by the logical units themselves.
The host system uses the third for general purpose battery-
backed storage.
Battery-backup power enables information retention during
system power down.
The banks are:
The memory maps and register content for each of the three
banks is illustrated in Section 4.7 on page 64.
The lower 64-byte locations of the three banks are shared.
The first 14 bytes store time and alarm data and contain
control registers. The next 50 bytes are general purpose
memory.
The upper 64 bytes of bank addresses are utilized as fol-
lows:
Bank 0 - General Purpose Register Bank
Bank 1 - RTC Register Bank
Bank 2 - APC Register Bank
Bank 0 supplies an additional 64 bytes of memory
backed RAM.
Bank 1 uses the upper 64 bytes for functions specific
to the RTC activity and for addressing Upper RAM.
Bank 2 uses the upper 64 bytes for functions specific
to the APC activity.
Advanced Power Control (APC)
(Logical Device 2)
Real-Time Clock (RTC) and Advanced Power Control (APC) (Logical Device 2)
49
Registers with reserved bits should be written in “Read-
Modify-Write” method.
RTC Control Register A (CRA) selects the active bank ac-
cording to the value of bits 6-4 (DV2-0). (See Table 4-3 on
page 53.)
All register locations within the device are accessed by the
RTC Index and Data registers (at base address and base
address+1). The Index register points to the register loca-
tion being accessed, and the Data register contains the
data to be transferred to or from the location. An additional
128 bytes of battery-backed RAM (also called upper RAM)
may be accessed via a second level address. The second
level uses the upper RAM Index register at index 50h of
bank 1 and the upper RAM Data register at index 53h of
bank 1.
Access to the three register banks and RAM may be locked.
For details see “RAM Lock Register (RLR), Index 47h” on
page 62.
4.1 RTC OPERATION OVERVIEW
The control registers listed in Table 4-1 control all RTC op-
eration. These registers appear in all the RTC register
banks. See Section 4.7 on page 64.
RTC configuration registers within the part store the set-
tings for all interface, configuration and power management
options. These registers are described in detail in Section
2.3 on page 26.
The RTC employs an external crystal connected to an inter-
nal oscillator circuit or an optional external clock input, as
the basic clock for timekeeping.
Local battery-backed RAM serves as storage for all time-
keeping functions.
4.1.1
Bus Interface
The RTC function is initially mapped to the default I/O loca-
tions at indexes 70h (Index) and 71h (data) within the part.
These locations may be reassigned, in compliance with the
Plug and Play requirements. See Section 2.2 on page 25.
External Clock and Timing Generation
The RTC can use one of the following timekeeping input
clock options:
Index
A 32768 Hz crystal connected externally at the X1C
and X2C pins completes an oscillator circuit and gen-
erates the 32768 Hz input clock. (See “Oscillator Inter-
nal and External Circuitry” on page 50.)
0Ah
0Bh
0Ch
0Dh
RTC Hardware and Functional Description
TABLE 4-1. RTC Control Registers
Name
CRA
CRB
CRC
CRD
RTC Control Register A
RTC Control Register B
RTC Control Register C
RTC Control Register D
Description
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