PC87307VUL National Semiconductor, PC87307VUL Datasheet - Page 47

• Manufacturer Part Number: PC87307VUL
• Description: PC87307/PC97307 Plug and Play Compatible and PC97 Compliant SuperI/O
• Manufacturer: National Semiconductor

If a 1 is asserted, an externally applied signal may pull down
the output. Therefore, input from this quasi-bidirectional cir-
cuit can be correctly read if preceded by a 1 written to out-
put.
P20 and P21 are driven by open-drain drivers.
When the KBC is reset, all port data bits are initialized to 1.
3.5 INTERNAL KBC - PC87307/PC97307 INTERFACE
The KBC interfaces internally with the part via three regis-
ters: an input (DBBIN), output (DBBOUT) and status (STA-
TUS) register. See Figure 3-1 on page 43 and Table 3-1.
RD WR
0
1
0
1
1
0
1
0
TABLE 3-1. System Interface Operations
PC87307/PC97307
Addresses
Default
60h
60h
64h
64h
Write
MR
Port
Read DBBOUT
Write DBBIN, F1 Clear (Data)
Read STATUS
Write DBBIN, F1 Set (Command)
Internal Bus
Keyboard (and Mouse) Controller (KBC) (Logical Devices 0 and 1)
Port Pin
Port Pin
Operation
FIGURE 3-7. Quasi-Bidirectional Driver
FIGURE 3-8. Current Limiting Resistor
D
100 500
100 500
ORL, ANL
PORT
F/F
–
–
R
P
R
IN
Q
Q
47
Table 3-1 illustrates the use of address line A2 to differenti-
ate between data and commands. The device is selected by
chip identification of default address 60h (when A2 is 0) or
64h (when A2 is 1). After reset, these addresses can be
changed by software.
3.5.1
The DBBOUT register transfers data from the keyboard
controller to the part. It is written to by the keyboard control-
ler and read by the part for transfer to the PC. The PC may
be notified of the need to read data from the KBC by an in-
terrupt request or by polling the Output Buffer Full (OBF) bit
(bit 0 of the KBC STATUS register described in Section
3.5.3 on page 48).
3.5.2
The DBBIN register transfers data from the part system to
the keyboard controller. (This transaction is transparent to
the user, who should program the device as if direct access
to the registers were in effect.)
When data is received in this manner, an Input Buffer Full
(IBF) internal interrupt may be generated in the KBC, to deal
with this data. Alternatively, reception of data in this manner
can be detected by the KBC polling the Input Buffer Full bit
(IBF, bit 1 of the KBC STATUS register).
The KBC DBBOUT Register, Offset 60h,
Read Only
The KBC DBBIN Register, Offset 60h (F1 Clear)
or 64h (F1 Set), Write Only
R: current limiting resistor
A small-value series current limiting
resistor is recommended when
port pins are used for input.
Q1
Q2
+VCC
Q3
PAD
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