HD6412320 RENESAS [Renesas Technology Corp], HD6412320 Datasheet - Page 189

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HD6412320

Manufacturer Part Number
HD6412320
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Bit 1—Write Data Buffer Enable (WDBE): Selects whether or not the write buffer function is
used for an external write cycle or DMAC single address cycle. In the H8S/2321 this bit is
reserved and should only be written with 0.
Bit 1
WDBE
0
1
Bit 0—WAIT Pin Enable (WAITE): Selects enabling or disabling of wait input by the WAIT
pin.
Bit 0
WAITE
0
1
6.2.6
MCR is an 8-bit readable/writable register that selects the DRAM strobe control method, number
of precharge cycles, access mode, address multiplexing shift size, and the number of wait states
inserted during refreshing, when areas 2 to 5 are designated as DRAM interface areas.
MCR is initialized to H'00 by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Note: In the H8S/2321 this register is reserved and must not be accessed.
Bit
Initial value :
R/W
Memory Control Register (MCR)
Description
Write data buffer function not used
Write data buffer function used
Description
Wait input by WAIT pin disabled. WAIT pin can be used as I/O port
Wait input by WAIT pin enabled
:
:
TPC
R/W
7
0
R/W
BE
6
0
RCDM
R/W
5
0
R/W
4
0
Rev.6.00 Sep. 27, 2007 Page 159 of 1268
MXC1
R/W
3
0
MXC0
R/W
2
0
Section 6 Bus Controller
REJ09B0220-0600
RLW1
R/W
1
0
(Initial value)
(Initial value)
RLW0
R/W
0
0

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