HD6412320 RENESAS [Renesas Technology Corp], HD6412320 Datasheet - Page 254

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HD6412320

Manufacturer Part Number
HD6412320
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Section 7 DMA Controller (Not Supported in the H8S/2321)
7.2.1
MAR is a 32-bit readable/writable register that specifies the transfer source address or destination
address.
The upper 8 bits of MAR are reserved: they are always read as 0, and cannot be modified.
Whether MAR functions as the source address register or as the destination address register can be
selected by means of the DTDIR bit in DMACR.
MAR is incremented or decremented each time a byte or word transfer is executed, so that the
address specified by MAR is constantly updated. For details, see section 7.2.4, DMA Control
Register (DMACR).
MAR is not initialized by a reset or in standby mode.
Rev.6.00 Sep. 27, 2007 Page 224 of 1268
REJ09B0220-0600
Bit
MAR
Initial value :
R/W
Bit
MAR
Initial value :
R/W
Memory Address Registers (MAR)
:
:
: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
:
:
:
31
15
0
*
30
14
0
*
29
13
0
*
28
12
0
*
27
11
0
*
26
10
0
*
25
0
9
*
24
— R/W R/W R/W R/W R/W R/W R/W R/W
0
8
*
23
7
*
*
22
6
*
*
21
*
5
*
20
4
*
*
19
3
*
*
18
2
*
*
*: Undefined
17
1
*
*
16
0
*
*

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