HD6412320 RENESAS [Renesas Technology Corp], HD6412320 Datasheet - Page 324
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HD6412320
Manufacturer Part Number
HD6412320
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6412320.pdf
(1302 pages)
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Section 7 DMA Controller (Not Supported in the H8S/2321)
Figure 7.30 shows a transfer example in which TEND output is enabled and word-size single
address mode transfer (write) is performed from an external device to external 8-bit, 2-state access
space.
A one-byte or one-word transfer is performed for one transfer request, and after the transfer the
bus is released. While the bus is released one or more bus cycles are executed by the CPU or DTC.
In the transfer end cycle (the cycle in which the transfer counter reaches 0), a one-state DMA dead
cycle is inserted after the DMA write cycle.
Rev.6.00 Sep. 27, 2007 Page 294 of 1268
REJ09B0220-0600
Address bus
DACK
TEND
HWR
LWR
φ
Figure 7.30 Example of Single Address Mode (Word Write) Transfer
release
Bus
DMA write
release
Bus
DMA write
release
Bus
Last transfer
DMA write
cycle
DMA
dead
release
Bus
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