HD6412320 RENESAS [Renesas Technology Corp], HD6412320 Datasheet - Page 690

• Manufacturer Part Number: HD6412320
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2300 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 14 Serial Communication Interface (SCI)
Thus the receive margin in asynchronous mode is given by formula (1) below.
Where M : Receive margin (%)
Assuming values of F = 0 and D = 0.5 in formula (1), a receive margin of 46.875% is given by
formula (2) below.
When D = 0.5 and F = 0,
However, this is a theoretical value, and a margin of 20% to 30% should be allowed in system
design.
Rev.6.00 Sep. 27, 2007 Page 660 of 1268
REJ09B0220-0600
Internal base
clock
Receive data
(RxD)
Synchronization
sampling timing
Data sampling
timing
M = | (0.5 –
M = (0.5 –
N : Ratio of bit rate to clock (N = 16)
D : Clock duty (D = 0 to 1.0)
L : Frame length (L = 9 to 12)
F : Absolute value of clock rate deviation
= 46.875%
Figure 14.21 Receive Data Sampling Timing in Asynchronous Mode
0
2 × 16
2N
8 clocks
Start bit
1
1
) – (L – 0.5) F –
) × 100%
16 clocks
7
| D – 0.5 |
N
15 0
(1 + F) | × 100%
D0
7
... Formula (1)
... Formula (2)
15 0
D1