HD6412320 RENESAS [Renesas Technology Corp], HD6412320 Datasheet - Page 21

• Manufacturer Part Number: HD6412320
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2300 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

12.3 Operation........................................................................................................................... 567
12.4 Interrupts ........................................................................................................................... 572
12.5 Sample Application........................................................................................................... 573
12.6 Usage Notes ...................................................................................................................... 574
Section 13 Watchdog Timer ..............................................................................581
13.1 Overview........................................................................................................................... 581
13.2 Register Descriptions ........................................................................................................ 584
13.3 Operation........................................................................................................................... 589
13.4 Interrupts ........................................................................................................................... 594
13.5 Usage Notes ...................................................................................................................... 594
12.2.5 Timer Control/Status Registers 0 and 1 (TCSR0, TCSR1).................................. 563
12.2.6 Module Stop Control Register (MSTPCR) .......................................................... 566
12.3.1 TCNT Incrementation Timing ............................................................................. 567
12.3.2 Compare Match Timing ....................................................................................... 568
12.3.3 Timing of TCNT External Reset.......................................................................... 570
12.3.4 Timing of Overflow Flag (OVF) Setting ............................................................. 570
12.3.5 Operation with Cascaded Connection .................................................................. 571
12.4.1 Interrupt Sources and DTC Activation ................................................................ 572
12.4.2 A/D Converter Activation.................................................................................... 572
12.6.1 Contention between TCNT Write and Clear........................................................ 574
12.6.2 Contention between TCNT Write and Increment ................................................ 575
12.6.3 Contention between TCOR Write and Compare Match ...................................... 576
12.6.4 Contention between Compare Matches A and B ................................................. 577
12.6.5 Switching of Internal Clocks and TCNT Operation............................................. 577
12.6.6 Interrupts and Module Stop Mode ....................................................................... 579
13.1.1 Features................................................................................................................ 581
13.1.2 Block Diagram ..................................................................................................... 582
13.1.3 Pin Configuration................................................................................................. 583
13.1.4 Register Configuration......................................................................................... 583
13.2.1 Timer Counter (TCNT)........................................................................................ 584
13.2.2 Timer Control/Status Register (TCSR) ................................................................ 585
13.2.3 Reset Control/Status Register (RSTCSR) ............................................................ 587
13.2.4 Notes on Register Access..................................................................................... 588
13.3.1 Operation in Watchdog Timer Mode ................................................................... 589
13.3.2 Operation in Interval Timer Mode ....................................................................... 591
13.3.3 Timing of Overflow Flag (OVF) Setting ............................................................. 592
13.3.4 Timing of Watchdog Timer Overflow Flag (WOVF) Setting.............................. 593
13.5.1 Contention between Timer Counter (TCNT) Write and Increment ..................... 594
13.5.2 Changing Value of CKS2 to CKS0...................................................................... 595
Rev.6.00 Sep. 27, 2007 Page xxi of xxx
REJ09B0220-0600