HD6412320 RENESAS [Renesas Technology Corp], HD6412320 Datasheet - Page 242

• Manufacturer Part Number: HD6412320
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2300 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 6 Bus Controller
6.10.4
Figure 6.37 shows the timing for transition to the bus released state.
Rev.6.00 Sep. 27, 2007 Page 212 of 1268
REJ09B0220-0600
Address bus
HWR, LWR
BREQO *
[1]
[2]
[3]
[4]
[5]
[6]
Note: * Output only when BREQOE is set to 1.
Data bus
BREQ
BACK
Low level of BREQ pin is sampled at rise of T
BACK pin is driven low at end of CPU read cycle, releasing bus to external
bus master.
BREQ pin state is still sampled in external bus released state.
High level of BREQ pin is sampled.
BACK pin is driven high, ending bus release cycle.
BREQO signal goes high 1.5 clocks after BACK signal goes high.
Transition Timing
RD
AS
φ
T
0
Figure 6.37 Bus Released State Transition Timing
CPU cycle
T
Address
1
[1]
Minimum
1 state
T
2
[2]
2
state.
External bus released state
[3]
High impedance
High impedance
High impedance
High impedance
High impedance
[4]
[5]
cycle
CPU
[6]