HD6412320 RENESAS [Renesas Technology Corp], HD6412320 Datasheet - Page 466

• Manufacturer Part Number: HD6412320
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2300 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 9 I/O Ports
9.14.2
Table 9.26 shows the port G register configuration.
Table 9.26 Port G Registers
Name
Port G data direction register
Port G data register
Port G register
Port function register 2
Notes: 1. Lower 16 bits of the address.
Port G Data Direction Register (PGDDR)
Modes 4 and 5
Modes 6 and 7
PGDDR is an 8-bit write-only register, the individual bits of which specify input or output for the
pins of port G. PGDDR cannot be read, and bits 7 to 5 are reserved. If PGDDR is read, an
undefined value will be read.
The PG4DDR bit is initialized by a reset, and in hardware standby mode, to 1 in modes 4 and 5,
and to 0 in modes 6 and 7. PGDDR retains its prior state in software standby mode. The OPE bit
in SBYCR is used to select whether the bus control output pins retain their output state or become
high-impedance when a transition is made to software standby mode.
Rev.6.00 Sep. 27, 2007 Page 436 of 1268
REJ09B0220-0600
Bit
Initial value :
R/W
Initial value :
R/W
2. Value of bits 4 to 0.
3. Initial value depends on the mode.
Register Configuration
:
:
:
Undefined Undefined Undefined
Undefined Undefined Undefined
—
—
—
7
—
—
—
6
Abbreviation
PGDDR
PGDR
PORTG
PFCR2
—
—
—
5
PG4DDR PG3DDR PG2DDR PG1DDR PG0DDR
W
W
4
1
0
R/W
W
R/W
R
R/W
W
W
3
0
0
Initial Value *
H'10/H'00 *
H'00
Undefined
H'30
W
W
2
0
0
3
2
W
W
1
0
0
Address *
H'FEBF
H'FF6F
H'FF5F
H'FFAC
W
W
0
0
0
1