HD6412320 RENESAS [Renesas Technology Corp], HD6412320 Datasheet - Page 289

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HD6412320

Manufacturer Part Number
HD6412320
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Transfer requests (activation sources) consist of A/D converter conversion end interrupts, external
requests, SCI transmission data empty/reception data full interrupts, and TPU channel 0 to 5
compare match/input capture A interrupts. External requests can be set for channel B only.
Figure 7.4 shows an example of the setting procedure for sequential mode.
Sequential mode setting
and transfer destination
Set number of transfers
Set transfer source
Read DMABCRL
Set DMABCRH
Sequential mode
Set DMABCRL
Set DMACR
addresses
Figure 7.4 Example of Sequential Mode Setting Procedure
[1]
[2]
[3]
[4]
[5]
[6]
Section 7 DMA Controller (Not Supported in the H8S/2321)
[1] Set each bit in DMABCRH.
[2] Set the transfer source address and transfer
[3] Set the number of transfers in ETCR.
[4] Set each bit in DMACR.
[5] Read the DTE bit in DMABCRL as 0.
[6] Set each bit in DMABCRL.
• Specify enabling or disabling of transfer end
• Set the DTE bit to 1 to enable transfer.
• Clear the FAE bit to 0 to select short address
• Specify enabling or disabling of internal
destination address in MAR and IOAR.
• Set the transfer data size with the DTSZ bit.
• Specify whether MAR is to be incremented or
• Clear the RPE bit to 0 to select sequential
• Specify the transfer direction with the DTDIR
• Select the activation source with bits DTF3 to
mode.
interrupt clearing with the DTA bit.
decremented with the DTID bit.
mode.
bit.
DTF0.
interrupts with the DTIE bit.
Rev.6.00 Sep. 27, 2007 Page 259 of 1268
REJ09B0220-0600

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