HD6412320 RENESAS [Renesas Technology Corp], HD6412320 Datasheet - Page 956

• Manufacturer Part Number: HD6412320
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2300 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 21 Power-Down Modes
If a SLEEP instruction is executed when the SSBY bit in SBYCR is set to 1, a transition is made
to software standby mode. When software standby mode is cleared by an external interrupt,
medium-speed mode is restored.
When the RES pin is driven low, a transition is made to the reset state, and medium-speed mode is
cleared. The same applies in the case of a reset caused by overflow of the watchdog timer.
When the STBY pin is driven low, a transition is made to hardware standby mode.
Figure 21.1 shows the timing for transition to and clearance of medium-speed mode.
Note: * The DMAC is not supported in the H8S/2321.
21.4
If a SLEEP instruction is executed when the SSBY bit in SBYCR is cleared to 0, the CPU enters
sleep mode. In sleep mode, CPU operation stops but the contents of the CPU’s internal registers
are retained. Other supporting modules do not stop.
Sleep mode is cleared by a reset or any interrupt, and the CPU returns to the normal program
execution state via the exception handling state. Sleep mode is not cleared if interrupts are
disabled, or if interrupts other than NMI are masked by the CPU.
When the STBY pin is driven low, a transition is made to hardware standby mode.
Rev.6.00 Sep. 27, 2007 Page 926 of 1268
REJ09B0220-0600
φ,
supporting module
clock
Bus master clock
Internal address bus
Internal write signal
Sleep Mode
Figure 21.1 Medium-Speed Mode Transition and Clearance Timing
SCKCR
Medium-speed mode
SCKCR