HD6412320 RENESAS [Renesas Technology Corp], HD6412320 Datasheet - Page 662

• Manufacturer Part Number: HD6412320
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2300 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 14 Serial Communication Interface (SCI)
Serial data transmission (asynchronous mode): Figure 14.5 shows a sample flowchart for serial
transmission.
The following procedure should be used for serial data transmission.
Rev.6.00 Sep. 27, 2007 Page 632 of 1268
REJ09B0220-0600
Note: * The DMAC is not supported in the H8S/2321.
and clear TDRE flag in SSR to 0
Write transmit data to TDR
Read TDRE flag in SSR
Read TEND flag in SSR
Clear TE bit in SCR to 0
Start of transmission
All data transmitted?
Clear DR to 0 and
Break output?
set DDR to 1
Initialization
TDRE = 1?
TEND = 1?
Figure 14.5 Sample Serial Transmission Flowchart
<End>
Yes
Yes
Yes
Yes
No
No
No
No
[1]
[2]
[3]
[4]
[1] SCI initialization:
[2] SCI status check and transmit data
[3] Serial transmission continuation
[4] Break output at the end of serial
The TxD pin is automatically
designated as the transmit data
output pin.
After the TE bit is set to 1, a frame
of 1s is output, and transmission is
enabled.
write:
Read SSR and check that the
TDRE flag is set to 1, then write
transmit data to TDR and clear the
TDRE flag to 0.
procedure:
To continue serial transmission,
read 1 from the TDRE flag to
confirm that writing is possible,
then write data to TDR, and then
clear the TDRE flag to 0. Checking
and clearing of the TDRE flag is
automatic when the DMAC* or DTC
is activated by a transmit-data-
empty interrupt (TXI) request, and
data is written to TDR.
transmission:
To output a break in serial
transmission, set DDR for the port
corresponding to the TxD pin to 1,
clear DR to 0, then clear the TE bit
in SCR to 0.