HD6412320 RENESAS [Renesas Technology Corp], HD6412320 Datasheet - Page 896

• Manufacturer Part Number: HD6412320
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2300 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 19 ROM
19.23.4 Erase Block Registers 2 (EBR2)
EBR2 is an 8-bit register that specifies the flash memory erase area block by block. Bits 3 to 0 in
EBR2 are initialized to H'00 by a reset, in hardware standby mode and software standby mode,
when a low level is being input to the FWE pin, and when the SWE1 bit in FLMCR1 is not set
when a high level is being input to the FWE pin. Bits 7 to 4 are initialized to 0 when a low level is
input to the FWE pin, and when a high level is input to the FWE pin and the SWE2 bit in
FLMCR2 is not set. When a bit in EBR2 is set, the corresponding block can be erased. Other
blocks are erase-protected. Set only one bit in EBR2 and EBR1 together (setting more than one bit
will automatically clear all EBR1 and EBR2 bits to 0). When on-chip flash memory is disabled, a
read will return H'00, and writes are invalid.
The flash memory block configuration is shown in table 19.49.
Rev.6.00 Sep. 27, 2007 Page 866 of 1268
REJ09B0220-0600
Bit
EBR2
Initial value :
R/W
:
:
EB15
R/W
7
0
EB14
R/W
6
0
EB13
R/W
5
0
EB12
R/W
4
0
EB11
R/W
3
0
EB10
R/W
2
0
R/W
EB9
1
0
R/W
EB8
0
0