HD6412320 RENESAS [Renesas Technology Corp], HD6412320 Datasheet - Page 729

• Manufacturer Part Number: HD6412320
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2300 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

• Retransfer operation when SCI is in transmit mode
[6] If an error signal is sent back from the receiving end after transmission of one frame is
[7] The TEND bit in SSR is not set for a frame for which an error signal indicating an abnormality
[8] If an error signal is not sent back from the receiving end, the ERS bit in SSR is not set.
[9] If an error signal is not sent back from the receiving end, transmission of one frame, including
Note: * The DMAC is not supported in the H8S/2321.
Figure 15.12 illustrates the retransfer operation when the SCI is in transmit mode.
completed, the ERS bit in SSR is set to 1. If the RIE bit in SCR is enabled at this time, an ERI
interrupt request is generated. The ERS bit in SSR should be kept cleared to 0 until the next
parity bit is sampled.
is received.
a retransfer, is judged to have been completed, and the TEND bit in SSR is set to 1. If the TIE
bit in SCR is enabled at this time, a TXI interrupt request is generated.
If data transfer by the DMAC * or DTC by means of the TXI source is enabled, the next data
can be written to TDR automatically. When data is written to TDR by the DMAC * or DTC,
the TDRE bit is automatically cleared to 0.
Ds
TDRE
TEND
FER/ERS
Transfer to TSR from TDR
D0 D1 D2 D3 D4 D5 D6 D7 Dp DE
nth transfer frame
Figure 15.12 Retransfer Operation in SCI Transmit Mode
[6]
[7]
Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp
Transfer to TSR from TDR
Retransferred frame
Rev.6.00 Sep. 27, 2007 Page 699 of 1268
Section 15 Smart Card Interface
(DE)
[8]
[9]
Ds D0 D1 D2 D3 D4
Transfer to TSR
REJ09B0220-0600
from TDR
Transfer
frame n+1