HD6412320 RENESAS [Renesas Technology Corp], HD6412320 Datasheet - Page 522

• Manufacturer Part Number: HD6412320
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2300 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 10 16-Bit Timer Pulse Unit (TPU)
10.4.4
Buffer operation, provided for channels 0 and 3, enables TGRC and TGRD to be used as buffer
registers.
Buffer operation differs depending on whether TGR has been designated as an input capture
register or as a compare match register.
Table 10.5 shows the register combinations used in buffer operation.
Table 10.5 Register Combinations in Buffer Operation
Channel
0
3
• When TGR is an output compare register
Rev.6.00 Sep. 27, 2007 Page 492 of 1268
REJ09B0220-0600
Buffer register
When a compare match occurs, the value in the buffer register for the corresponding channel is
transferred to the timer general register.
This operation is illustrated in figure 10.16.
Buffer Operation
Figure 10.16 Compare Match Buffer Operation
Timer General Register
TGR0A
TGR0B
TGR3A
TGR3B
Compare match signal
Timer general
register
Comparator
Buffer Register
TGR0C
TGR0D
TGR3C
TGR3D
TCNT