ATMEGA16A-PU | |
|---|---|
| Manufacturer Part Number | ATMEGA16A-PU |
| Description | MCU AVR 16K FLASH 16MHZ 40-PDIP |
| Manufacturer | Atmel |
| Series | AVR® ATmega |
| ATMEGA16A-PU datasheets |
|
Specifications of ATMEGA16A-PU | |||
|---|---|---|---|
| Core Processor | AVR | Core Size | 8-Bit |
| Speed | 16MHz | Connectivity | I²C, SPI, UART/USART |
| Peripherals | Brown-out Detect/Reset, POR, PWM, WDT | Number Of I /o | 32 |
| Program Memory Size | 16KB (8K x 16) | Program Memory Type | FLASH |
| Eeprom Size | 512 x 8 | Ram Size | 1K x 8 |
| Voltage - Supply (vcc/vdd) | 2.7 V ~ 5.5 V | Data Converters | A/D 8x10b |
| Oscillator Type | Internal | Operating Temperature | -40°C ~ 85°C |
| Package / Case | 40-DIP (0.600", 15.24mm) | Processor Series | ATMEGA16x |
| Core | AVR8 | Data Bus Width | 8 bit |
| Data Ram Size | 1 KB | Interface Type | 2-Wire/SPI/USART |
| Maximum Clock Frequency | 16 MHz | Number Of Programmable I/os | 32 |
| Number Of Timers | 3 | Maximum Operating Temperature | + 85 C |
| Mounting Style | Through Hole | 3rd Party Development Tools | EWAVR, EWAVR-BL |
| Development Tools By Supplier | ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT | Minimum Operating Temperature | - 40 C |
| On-chip Adc | 8-ch x 10-bit | Package | 40PDIP |
| Device Core | AVR | Family Name | ATmega |
| Maximum Speed | 16 MHz | Operating Supply Voltage | 3.3|5 V |
| Controller Family/series | AVR MEGA | No. Of I/o's | 32 |
| Eeprom Memory Size | 512Byte | Ram Memory Size | 1KB |
| Cpu Speed | 16MHz | Rohs Compliant | Yes |
| For Use With | ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KIT | Lead Free Status / RoHS Status | Lead free / RoHS Compliant |
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PrevNext
as a consequence, the device does not enter Power-down entirely. It is therefore recommended
to verify that the EEPROM write operation is completed before entering Power-down.
7.4.3
Preventing EEPROM Corruption
During periods of low V
too low for the CPU and the EEPROM to operate properly. These issues are the same as for
board level systems using EEPROM, and the same design solutions should be applied.
An EEPROM data corruption can be caused by two situations when the voltage is too low. First,
a regular write sequence to the EEPROM requires a minimum voltage to operate correctly. Sec-
ondly, the CPU itself can execute instructions incorrectly, if the supply voltage is too low.
EEPROM data corruption can easily be avoided by following this design recommendation:
Keep the AVR RESET active (low) during periods of insufficient power supply voltage. This
can be done by enabling the internal Brown-out Detector (BOD). If the detection level of the
internal BOD does not match the needed detection level, an external low V
tion circuit can be used. If a reset occurs while a write operation is in progress, the write
operation will be completed provided that the power supply voltage is sufficient.
7.5
I/O Memory
The I/O space definition of the ATmega16A is shown in
All ATmega16A I/Os and peripherals are placed in the I/O space. The I/O locations are
accessed by the IN and OUT instructions, transferring data between the 32 general purpose
working registers and the I/O space. I/O Registers within the address range $00 - $1F are
directly bit-accessible using the SBI and CBI instructions. In these registers, the value of single
bits can be checked by using the SBIS and SBIC instructions. Refer to the Instruction Set sec-
tion for more details. When using the I/O specific commands IN and OUT, the I/O addresses $00
- $3F must be used. When addressing I/O Registers as data space using LD and ST instruc-
tions, $20 must be added to these addresses.
For compatibility with future devices, reserved bits should be written to zero if accessed.
Reserved I/O memory addresses should never be written.
Some of the Status Flags are cleared by writing a logical one to them. Note that the CBI and SBI
instructions will operate on all bits in the I/O Register, writing a one back into any flag read as
set, thus clearing the flag. The CBI and SBI instructions work with registers $00 to $1F only.
The I/O and Peripherals Control Registers are explained in later sections.
7.6
Register Description
7.6.1
EEARH and EEARL – The EEPROM Address Register
Bit
Read/Write
Initial Value
8154B–AVR–07/09
the EEPROM data can be corrupted because the supply voltage is
CC,
15
14
13
12
–
–
–
–
EEAR7
EEAR6
EEAR5
EEAR4
7
6
5
4
R
R
R
R
R/W
R/W
R/W
R/W
0
0
0
0
X
X
X
X
ATmega16A
Reset Protec-
CC
“Register Summary” on page
11
10
9
8
–
–
–
EEAR8
EEAR3
EEAR2
EEAR1
EEAR0
3
2
1
0
R
R
R
R/W
R/W
R/W
R/W
R/W
0
0
0
X
X
X
X
X
334.
EEARH
EEARL
19
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