MCU AVR 16K FLASH 16MHZ 40-PDIP

ATMEGA16A-PU

Manufacturer Part NumberATMEGA16A-PU
DescriptionMCU AVR 16K FLASH 16MHZ 40-PDIP
ManufacturerAtmel
SeriesAVR® ATmega
ATMEGA16A-PU datasheets
 


Specifications of ATMEGA16A-PU

Core ProcessorAVRCore Size8-Bit
Speed16MHzConnectivityI²C, SPI, UART/USART
PeripheralsBrown-out Detect/Reset, POR, PWM, WDTNumber Of I /o32
Program Memory Size16KB (8K x 16)Program Memory TypeFLASH
Eeprom Size512 x 8Ram Size1K x 8
Voltage - Supply (vcc/vdd)2.7 V ~ 5.5 VData ConvertersA/D 8x10b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case40-DIP (0.600", 15.24mm)Processor SeriesATMEGA16x
CoreAVR8Data Bus Width8 bit
Data Ram Size1 KBInterface Type2-Wire/SPI/USART
Maximum Clock Frequency16 MHzNumber Of Programmable I/os32
Number Of Timers3Maximum Operating Temperature+ 85 C
Mounting StyleThrough Hole3rd Party Development ToolsEWAVR, EWAVR-BL
Development Tools By SupplierATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKITMinimum Operating Temperature- 40 C
On-chip Adc8-ch x 10-bitPackage40PDIP
Device CoreAVRFamily NameATmega
Maximum Speed16 MHzOperating Supply Voltage3.3|5 V
Controller Family/seriesAVR MEGANo. Of I/o's32
Eeprom Memory Size512ByteRam Memory Size1KB
Cpu Speed16MHzRohs CompliantYes
For Use WithATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KITLead Free Status / RoHS StatusLead free / RoHS Compliant
show all specifications
ATMEGA16A-MU PDF datasheetATMEGA16A-MU PDF datasheet #2
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Figure 27-10. Parallel Programming Timing, Reading Sequence (within the Same Page) with
XTAL1
DATA
Note:
Table 27-7.
Symbol
V
PP
I
PP
t
DVXH
t
XLXH
t
XHXL
t
XLDX
t
XLWL
t
XLPH
t
PLXH
t
BVPH
t
PHPL
t
PLBX
t
WLBX
t
PLWL
t
BVWL
t
WLWH
t
WLRL
t
WLRH
t
WLRH_CE
t
XLOL
8154B–AVR–07/09
(1)
Timing Requirements
LOAD ADDRESS
(LOW BYTE)
t
XLOL
BS1
t
OLDV
OE
ADDR0 (Low Byte)
XA0
XA1
1. The timing requirements shown in
ing operation.
Parallel Programming Characteristics, V
Parameter
Programming Enable Voltage
Programming Enable Current
Data and Control Valid before XTAL1 High
XTAL1 Low to XTAL1 High
XTAL1 Pulse Width High
Data and Control Hold after XTAL1 Low
XTAL1 Low to WR Low
XTAL1 Low to PAGEL high
PAGEL low to XTAL1 high
BS1 Valid before PAGEL High
PAGEL Pulse Width High
BS1 Hold after PAGEL Low
BS2/1 Hold after WR Low
PAGEL Low to WR Low
BS1 Valid to WR Low
WR Pulse Width Low
WR Low to RDY/BSY Low
(1)
WR Low to RDY/BSY High
WR Low to RDY/BSY High for Chip Erase
XTAL1 Low to OE Low
ATmega16A
READ DATA
READ DATA
(LOW BYTE)
(HIGH BYTE)
t
BVDV
t
OHDZ
DATA (High Byte)
DATA (Low Byte)
Figure 27-8
(i.e., t
, t
, and t
DVXH
XHXL
XLDX
= 5 V ± 10%
CC
Min
Typ
11.5
67
200
150
67
0
0
150
67
150
67
67
67
67
150
0
3.7
(2)
7.5
0
LOAD ADDRESS
(LOW BYTE)
ADDR1 (Low Byte)
) also apply to read-
Max
Units
12.5
V
μA
250
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
μs
1
4.5
ms
9
ms
ns
303

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