MCU AVR 16K FLASH 16MHZ 40-PDIP

ATMEGA16A-PU

Manufacturer Part NumberATMEGA16A-PU
DescriptionMCU AVR 16K FLASH 16MHZ 40-PDIP
ManufacturerAtmel
SeriesAVR® ATmega
ATMEGA16A-PU datasheets
 


Specifications of ATMEGA16A-PU

Core ProcessorAVRCore Size8-Bit
Speed16MHzConnectivityI²C, SPI, UART/USART
PeripheralsBrown-out Detect/Reset, POR, PWM, WDTNumber Of I /o32
Program Memory Size16KB (8K x 16)Program Memory TypeFLASH
Eeprom Size512 x 8Ram Size1K x 8
Voltage - Supply (vcc/vdd)2.7 V ~ 5.5 VData ConvertersA/D 8x10b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case40-DIP (0.600", 15.24mm)Processor SeriesATMEGA16x
CoreAVR8Data Bus Width8 bit
Data Ram Size1 KBInterface Type2-Wire/SPI/USART
Maximum Clock Frequency16 MHzNumber Of Programmable I/os32
Number Of Timers3Maximum Operating Temperature+ 85 C
Mounting StyleThrough Hole3rd Party Development ToolsEWAVR, EWAVR-BL
Development Tools By SupplierATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKITMinimum Operating Temperature- 40 C
On-chip Adc8-ch x 10-bitPackage40PDIP
Device CoreAVRFamily NameATmega
Maximum Speed16 MHzOperating Supply Voltage3.3|5 V
Controller Family/seriesAVR MEGANo. Of I/o's32
Eeprom Memory Size512ByteRam Memory Size1KB
Cpu Speed16MHzRohs CompliantYes
For Use WithATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KITLead Free Status / RoHS StatusLead free / RoHS Compliant
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
Page 271
272
Page 272
273
Page 273
274
Page 274
275
Page 275
276
Page 276
277
Page 277
278
Page 278
279
Page 279
280
Page 280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
Page 277/352

Download datasheet (8Mb)Embed
PrevNext
26.8.2
SPI Serial Programming Algorithm
When writing serial data to the ATmega16A, data is clocked on the rising edge of SCK.
When reading data from the ATmega16A, data is clocked on the falling edge of SCK. See
27-5
for timing details.
To program and verify the ATmega16A in the SPI Serial Programming mode, the following
sequence is recommended (See four byte instruction formats in
1. Power-up sequence:
Apply power between V
tems, the programmer can not guarantee that SCK is held low during power-up. In this
case, RESET must be given a positive pulse of at least two CPU clock cycles duration
after SCK has been set to “0”.
2. Wait for at least 20 ms and enable SPI Serial Programming by sending the Program-
ming Enable serial instruction to pin MOSI.
3. The SPI Serial Programming instructions will not work if the communication is out of
synchronization. When in sync. the second byte ($53), will echo back when issuing the
third byte of the Programming Enable instruction. Whether the echo is correct or not, all
four bytes of the instruction must be transmitted. If the $53 did not echo back, give
RESET a positive pulse and issue a new Programming Enable command.
4. The Flash is programmed one page at a time. The
267
address and data together with the Load Program Memory Page instruction. To ensure
correct loading of the page, the data Low byte must be loaded before data High byte is
applied for a given address. The Program Memory Page is stored by loading the Write
Program Memory Page instruction with the 7 MSB of the address. If polling is not used,
the user must wait at least t
Accessing the SPI Serial Programming interface before the Flash write operation com-
pletes can result in incorrect programming.
5. The EEPROM array is programmed one byte at a time by supplying the address and
data together with the appropriate Write instruction. An EEPROM memory location is
first automatically erased before new data is written. If polling is not used, the user must
wait at least t
erased device, no $FFs in the data file(s) need to be programmed.
6. Any memory location can be verified by using the Read instruction which returns the
content at the selected address at serial output MISO.
7. At the end of the programming session, RESET can be set high to commence normal
operation.
8. Power-off sequence (if needed):
Set RESET to “1”.
Turn V
26.8.3
Data Polling Flash
When a page is being programmed into the Flash, reading an address location within the page
being programmed will give the value $FF. At the time the device is ready for a new page, the
programmed value will read correctly. This is used to determine when the next page can be writ-
ten. Note that the entire page is written simultaneously and any address within the page can be
used for polling. Data polling of the Flash will not work for the value $FF, so when programming
this value, the user will have to wait for at least t
a chip erased device contains $FF in all locations, programming of addresses that are meant to
contain $FF, can be skipped. See
8154B–AVR–07/09
and GND while RESET and SCK are set to “0”. In some sys-
CC
. The memory page is loaded one byte at a time by supplying the 6 LSB of the
before issuing the next page. (See
WD_FLASH
before issuing the next byte. (See
WD_EEPROM
power off.
CC
Table 26-12
ATmega16A
Figure 26-13 on page
page size is found in
Table 26-5 on page
Table
Table
26-12). In a chip
before programming the next page. As
WD_FLASH
for t
value
WD_FLASH
Figure
278):
26-12).
277