ATMEGA16A-PU Atmel, ATMEGA16A-PU Datasheet - Page 277

MCU AVR 16K FLASH 16MHZ 40-PDIP

ATMEGA16A-PU

Manufacturer Part Number
ATMEGA16A-PU
Description
MCU AVR 16K FLASH 16MHZ 40-PDIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA16A-PU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
ATMEGA16x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
2-Wire/SPI/USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Package
40PDIP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
Operating Supply Voltage
3.3|5 V
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
16MHz
Rohs Compliant
Yes
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Manufacturer
Quantity
Price
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26.8.2
26.8.3
8154B–AVR–07/09
SPI Serial Programming Algorithm
Data Polling Flash
When writing serial data to the ATmega16A, data is clocked on the rising edge of SCK.
When reading data from the ATmega16A, data is clocked on the falling edge of SCK. See
27-5
To program and verify the ATmega16A in the SPI Serial Programming mode, the following
sequence is recommended (See four byte instruction formats in
When a page is being programmed into the Flash, reading an address location within the page
being programmed will give the value $FF. At the time the device is ready for a new page, the
programmed value will read correctly. This is used to determine when the next page can be writ-
ten. Note that the entire page is written simultaneously and any address within the page can be
used for polling. Data polling of the Flash will not work for the value $FF, so when programming
this value, the user will have to wait for at least t
a chip erased device contains $FF in all locations, programming of addresses that are meant to
contain $FF, can be skipped. See
1. Power-up sequence:
2. Wait for at least 20 ms and enable SPI Serial Programming by sending the Program-
3. The SPI Serial Programming instructions will not work if the communication is out of
4. The Flash is programmed one page at a time. The
5. The EEPROM array is programmed one byte at a time by supplying the address and
6. Any memory location can be verified by using the Read instruction which returns the
7. At the end of the programming session, RESET can be set high to commence normal
8. Power-off sequence (if needed):
for timing details.
Apply power between V
tems, the programmer can not guarantee that SCK is held low during power-up. In this
case, RESET must be given a positive pulse of at least two CPU clock cycles duration
after SCK has been set to “0”.
ming Enable serial instruction to pin MOSI.
synchronization. When in sync. the second byte ($53), will echo back when issuing the
third byte of the Programming Enable instruction. Whether the echo is correct or not, all
four bytes of the instruction must be transmitted. If the $53 did not echo back, give
RESET a positive pulse and issue a new Programming Enable command.
267
address and data together with the Load Program Memory Page instruction. To ensure
correct loading of the page, the data Low byte must be loaded before data High byte is
applied for a given address. The Program Memory Page is stored by loading the Write
Program Memory Page instruction with the 7 MSB of the address. If polling is not used,
the user must wait at least t
Accessing the SPI Serial Programming interface before the Flash write operation com-
pletes can result in incorrect programming.
data together with the appropriate Write instruction. An EEPROM memory location is
first automatically erased before new data is written. If polling is not used, the user must
wait at least t
erased device, no $FFs in the data file(s) need to be programmed.
content at the selected address at serial output MISO.
operation.
Set RESET to “1”.
Turn V
. The memory page is loaded one byte at a time by supplying the 6 LSB of the
CC
power off.
WD_EEPROM
CC
before issuing the next byte. (See
and GND while RESET and SCK are set to “0”. In some sys-
WD_FLASH
Table 26-12
before issuing the next page. (See
for t
WD_FLASH
WD_FLASH
page size is found in
before programming the next page. As
value
Table
Figure 26-13 on page
26-12). In a chip
ATmega16A
Table 26-5 on page
Table
26-12).
278):
Figure
277

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