ATMEGA16A-PU Atmel, ATMEGA16A-PU Datasheet - Page 150

MCU AVR 16K FLASH 16MHZ 40-PDIP

ATMEGA16A-PU

Manufacturer Part Number
ATMEGA16A-PU
Description
MCU AVR 16K FLASH 16MHZ 40-PDIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA16A-PU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
ATMEGA16x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
2-Wire/SPI/USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Package
40PDIP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
Operating Supply Voltage
3.3|5 V
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
16MHz
Rohs Compliant
Yes
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
19.3.2
19.3.3
19.3.4
150
ATmega16A
Double Speed Operation (U2X)
External Clock
Synchronous Clock Operation
Table 19-1.
Note:
Some examples of UBRR values for some system clock frequencies are found in
(see
The transfer rate can be doubled by setting the U2X bit in UCSRA. Setting this bit only has effect
for the asynchronous operation. Set this bit to zero when using synchronous operation.
Setting this bit will reduce the divisor of the baud rate divider from 16 to 8, effectively doubling
the transfer rate for asynchronous communication. Note however that the receiver will in this
case only use half the number of samples (reduced from 16 to 8) for data sampling and clock
recovery, and therefore a more accurate baud rate setting and system clock are required when
this mode is used. For the Transmitter, there are no downsides.
External clocking is used by the synchronous Slave modes of operation. The description in this
section refers to
External clock input from the XCK pin is sampled by a synchronization register to minimize the
chance of meta-stability. The output from the synchronization register must then pass through
an edge detector before it can be used by the Transmitter and receiver. This process introduces
a two CPU clock period delay and therefore the maximum external XCK clock frequency is lim-
ited by the following equation:
Note that f
add some margin to avoid possible loss of data due to frequency variations.
When Synchronous mode is used (UMSEL = 1), the XCK pin will be used as either clock input
(Slave) or clock output (Master). The dependency between the clock edges and data sampling
or data change is the same. The basic principle is that data input (on RxD) is sampled at the
opposite XCK clock edge of the edge the data output (TxD) is changed.
Operating Mode
Asynchronous Normal Mode
(U2X = 0)
Asynchronous Double Speed Mode (U2X
= 1)
Synchronous Master Mode
page
BAUD
f
UBRR
OSC
1. The baud rate is defined to be the transfer rate in bit per second (bps).
osc
171).
depends on the stability of the system clock source. It is therefore recommended to
Equations for Calculating Baud Rate Register Setting
Figure 19-2
Baud rate (in bits per second, bps)
System Oscillator clock frequency
Contents of the UBRRH and UBRRL Registers, (0 - 4095)
for details.
BAUD
f
BAUD
BAUD
XCK
Equation for Calculating
<
Baud Rate
f
---------- -
=
OSC
=
=
4
-------------------------------------- -
16 UBRR
---------------------------------- -
8 UBRR
---------------------------------- -
2 UBRR
(
(
(
f
f
f
OSC
OSC
OSC
(1)
+
+
+
1
1
1
)
)
)
Equation for Calculating
UBRR
UBRR
UBRR
UBRR Value
=
=
=
----------------------- - 1
16BAUD
------------------- - 1
8BAUD
------------------- - 1
2BAUD
8154B–AVR–07/09
f
f
f
OSC
OSC
OSC
Table 19-9

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