ATMEGA16A-PU Atmel, ATMEGA16A-PU Datasheet - Page 299

MCU AVR 16K FLASH 16MHZ 40-PDIP

ATMEGA16A-PU

Manufacturer Part Number
ATMEGA16A-PU
Description
MCU AVR 16K FLASH 16MHZ 40-PDIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA16A-PU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
ATMEGA16x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
2-Wire/SPI/USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Package
40PDIP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
Operating Supply Voltage
3.3|5 V
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
16MHz
Rohs Compliant
Yes
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
8154B–AVR–07/09
.
Table 27-5.
Figure 27-6. SPI Interface Timing Requirements (Master Mode)
10
11
12
13
14
15
16
17
18
1
2
3
4
5
6
7
8
9
(Data Output)
(Data Input)
(CPOL = 0)
(CPOL = 1)
SS high to tri-state
MISO
MOSI
SCK
SCK
SCK to out high
SCK to SS high
SS low to SCK
SCK high/low
Rise/Fall time
SCK high/low
Rise/Fall time
SS
SS low to out
SPI Timing Parameters
Description
SCK period
Out to SCK
SCK period
SCK to out
SCK to out
Setup
Setup
Hold
Hold
6
4
MSB
5
MSB
Master
Master
Master
Master
Master
Master
Master
Master
Mode
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
7
...
4 • t
2 • t
2 • t
...
Min
10
10
20
SCK
SCK
SCK
See
50% duty cycle
2
0.5 • t
Table 18-5
Typ
3.6
LSB
10
10
10
10
15
15
10
1
SCK
LSB
ATmega16A
2
3
8
Max
1.6
ns
µs
ns
299

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