ATMEGA16A-PU Atmel, ATMEGA16A-PU Datasheet - Page 343
Manufacturer Part Number
MCU AVR 16K FLASH 16MHZ 40-PDIP
Specifications of ATMEGA16A-PU
I²C, SPI, UART/USART
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
Program Memory Size
16KB (8K x 16)
Program Memory Type
512 x 8
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Data Bus Width
Data Ram Size
Maximum Clock Frequency
Number Of Programmable I/os
Number Of Timers
Maximum Operating Temperature
+ 85 C
3rd Party Development Tools
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
8-ch x 10-bit
Operating Supply Voltage
No. Of I/o's
Eeprom Memory Size
Ram Memory Size
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ATmega16A rev. N to rev. Q
The revision letter in this section refers to the revision of the ATmega16A device.
1. First Analog Comparator conversion may be delayed
2. Interrupts may be lost when writing the timer registers in the asynchronous timer
3. IDCODE masks data from TDI input
4. Reading EEPROM by using ST or STS to set EERE bit triggers unexpected interrupt
First Analog Comparator conversion may be delayed
Interrupts may be lost when writing the timer registers in the asynchronous timer
IDCODE masks data from TDI input
Reading EEPROM by using ST or STS to set EERE bit triggers unexpected interrupt request
If the device is powered by a slow rising V
take longer than expected on some devices.
When the device has been powered or reset, disable then enable theAnalog Comparator
before the first conversion.
The interrupt will be lost if a timer register that is synchronous timer clock is written when the
asynchronous Timer/Counter register (TCNTx) is 0x00.
Always check that the asynchronous Timer/Counter register neither have the value 0xFF nor
0x00 before writing to the asynchronous Timer Control Register (TCCRx), asynchronous
Timer Counter Register (TCNTx), or asynchronous Output Compare Register (OCRx).
The JTAG instruction IDCODE is not working correctly. Data to succeeding devices are
replaced by all-ones during Update-DR.
Problem Fix / Workaround
Reading EEPROM by using the ST or STS command to set the EERE bit in the EECR reg-
ister triggers an unexpected EEPROM interrupt request.
Problem Fix / Workaround
Always use OUT or SBI to set EERE in EECR.
If ATmega16A is the only device in the scan chain, the problem is not visible.
Select the Device ID Register of the ATmega16A by issuing the IDCODE instruction
or by entering the Test-Logic-Reset state of the TAP controller to read out the
contents of its Device ID Register and possibly data from succeeding devices of the
scan chain. Issue the BYPASS instruction to the ATmega16A while reading the
Device ID Registers of preceding devices of the boundary scan chain.
If the Device IDs of all devices in the boundary scan chain must be captured
simultaneously, the ATmega16A must be the fist device in the chain.
, the first Analog Comparator conversion will