ATMEGA16A-PU Atmel, ATMEGA16A-PU Datasheet - Page 348

MCU AVR 16K FLASH 16MHZ 40-PDIP

ATMEGA16A-PU

Manufacturer Part Number
ATMEGA16A-PU
Description
MCU AVR 16K FLASH 16MHZ 40-PDIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA16A-PU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
ATMEGA16x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
2-Wire/SPI/USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Package
40PDIP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
Operating Supply Voltage
3.3|5 V
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
16MHz
Rohs Compliant
Yes
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
19 USART ................................................................................................... 146
20 Two-wire Serial Interface ..................................................................... 175
21 Analog Comparator .............................................................................. 204
22 Analog to Digital Converter ................................................................. 207
iv
18.1
18.2
18.3
18.4
18.5
19.1
19.2
19.3
19.4
19.5
19.6
19.7
19.8
19.9
19.10
19.11
20.1
20.2
20.3
20.4
20.5
20.6
20.7
20.8
20.9
21.1
21.2
22.1
22.2
22.3
22.4
ATmega16A
Features ........................................................................................................136
Overview ........................................................................................................136
SS Pin Functionality ......................................................................................141
Data Modes ...................................................................................................141
Register Description ......................................................................................143
Features ........................................................................................................146
Overview ........................................................................................................146
Clock Generation ...........................................................................................148
Frame Formats ..............................................................................................151
USART Initialization .......................................................................................152
Data Transmission – The USART Transmitter ..............................................153
Data Reception – The USART Receiver .......................................................156
Asynchronous Data Reception ......................................................................160
Multi-processor Communication Mode ..........................................................163
Accessing UBRRH/ UCSRC Registers .........................................................164
Examples of Baud Rate Setting .....................................................................171
Features ........................................................................................................175
Two-wire Serial Interface Bus Definition ........................................................175
Data Transfer and Frame Format ..................................................................176
Multi-master Bus Systems, Arbitration and Synchronization .........................179
Overview of the TWI Module .........................................................................181
Using the TWI ................................................................................................183
Transmission Modes .....................................................................................186
Multi-master Systems and Arbitration ............................................................199
Register Description ......................................................................................200
Analog Comparator Multiplexed Input ...........................................................204
Register Description ......................................................................................205
Features ........................................................................................................207
Overview ........................................................................................................207
Operation .......................................................................................................208
Starting a Conversion ....................................................................................209
8154B–AVR–07/09

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