ATMEGA16A-PU Atmel, ATMEGA16A-PU Datasheet - Page 262

MCU AVR 16K FLASH 16MHZ 40-PDIP

ATMEGA16A-PU

Manufacturer Part Number
ATMEGA16A-PU
Description
MCU AVR 16K FLASH 16MHZ 40-PDIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA16A-PU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
ATMEGA16x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
2-Wire/SPI/USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Package
40PDIP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
Operating Supply Voltage
3.3|5 V
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
16MHz
Rohs Compliant
Yes
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA16A-PU
Manufacturer:
AT
Quantity:
20 000
Company:
Part Number:
ATMEGA16A-PU
Quantity:
25 000
25.8.13
262
ATmega16A
ATmega16A Boot Loader Parameters
In
ming are given.
Table 25-6.
Note:
Table 25-7.
Note:
BOOTSZ1
1
1
0
0
Section
Read-While-Write section (RWW)
No Read-While-Write section (NRWW)
Table 25-6
Do_spm:
Wait_spm:
Wait_ee:
; check for previous SPM complete
in
sbrc temp1, SPMEN
rjmp Wait_spm
; input: spmcrval determines SPM action
; disable interrupts if enabled, store status
in
cli
; check that no EEPROM write access is present
sbic EECR, EEWE
rjmp Wait_ee
; SPM timed sequence
out
spm
; restore SREG (to enable interrupts if originally enabled)
out
ret
1. The different BOOTSZ Fuse configurations are shown in
1. For details about these two section, see
251
temp1, SPMCR
temp2, SREG
SPMCR, spmcrval
SREG, temp2
BOOTSZ0
1
0
1
0
through
Boot Size Configuration
Read-While-Write Limit
and
“RWW – Read-While-Write Section” on page 251
Table
Boot
Size
128
words
256
words
512
words
1024
words
25-8, the parameters used in the description of the self program-
Pages
2
4
8
16
(1)
(1)
Application
Flash
Section
$0000 -
$1F7F
$0000 -
$1EFF
$0000 -
$1DFF
$0000 -
$1BFF
“NRWW – No Read-While-Write Section” on page
Boot
Loader
Flash
Section
$1F80 -
$1FFF
$1F00 -
$1FFF
$1E00 -
$1FFF
$1C00 -
$1FFF
Pages
112
Figure 25-2
16
End
Application
section
$1F7F
$1EFF
$1DFF
$1BFF
Address
$0000 - $1BFF
$1C00 - $1FFF
Boot Reset
Address (start
Boot Loader
Section)
$1F80
$1F00
$1E00
$1C00
8154B–AVR–07/09

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