MCU AVR 16K FLASH 16MHZ 40-PDIP

ATMEGA16A-PU

Manufacturer Part NumberATMEGA16A-PU
DescriptionMCU AVR 16K FLASH 16MHZ 40-PDIP
ManufacturerAtmel
SeriesAVR® ATmega
ATMEGA16A-PU datasheets
 


Specifications of ATMEGA16A-PU

Core ProcessorAVRCore Size8-Bit
Speed16MHzConnectivityI²C, SPI, UART/USART
PeripheralsBrown-out Detect/Reset, POR, PWM, WDTNumber Of I /o32
Program Memory Size16KB (8K x 16)Program Memory TypeFLASH
Eeprom Size512 x 8Ram Size1K x 8
Voltage - Supply (vcc/vdd)2.7 V ~ 5.5 VData ConvertersA/D 8x10b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case40-DIP (0.600", 15.24mm)Processor SeriesATMEGA16x
CoreAVR8Data Bus Width8 bit
Data Ram Size1 KBInterface Type2-Wire/SPI/USART
Maximum Clock Frequency16 MHzNumber Of Programmable I/os32
Number Of Timers3Maximum Operating Temperature+ 85 C
Mounting StyleThrough Hole3rd Party Development ToolsEWAVR, EWAVR-BL
Development Tools By SupplierATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKITMinimum Operating Temperature- 40 C
On-chip Adc8-ch x 10-bitPackage40PDIP
Device CoreAVRFamily NameATmega
Maximum Speed16 MHzOperating Supply Voltage3.3|5 V
Controller Family/seriesAVR MEGANo. Of I/o's32
Eeprom Memory Size512ByteRam Memory Size1KB
Cpu Speed16MHzRohs CompliantYes
For Use WithATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KITLead Free Status / RoHS StatusLead free / RoHS Compliant
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Page 65/352

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12.4
Register Description
12.4.1
SFIOR – Special Function I/O Register
Bit
Read/Write
Initial Value
• Bit 2 – PUD: Pull-up disable
When this bit is written to one, the pull-ups in the I/O ports are disabled even if the DDxn and
PORTxn Registers are configured to enable the pull-ups ({DDxn, PORTxn} = 0b01). See
figuring the Pin” on page 50
12.4.2
PORTA – Port A Data Register
Bit
Read/Write
Initial Value
12.4.3
DDRA – Port A Data Direction Register
Bit
Read/Write
Initial Value
12.4.4
PINA – Port A Input Pins Address
Bit
Read/Write
Initial Value
12.4.5
PORTB – Port B Data Register
Bit
Read/Write
Initial Value
12.4.6
DDRB – Port B Data Direction Register
Bit
Read/Write
Initial Value
8154B–AVR–07/09
7
6
5
4
ADTS2
ADTS1
ADTS0
R/W
R/W
R/W
R
0
0
0
0
for more details about this feature.
7
6
5
4
PORTA7
PORTA6
PORTA5
PORTA4
R/W
R/W
R/W
R/W
0
0
0
0
7
6
5
4
DDA7
DDA6
DDA5
DDA4
R/W
R/W
R/W
R/W
0
0
0
0
7
6
5
4
PINA7
PINA6
PINA5
PINA4
R
R
R
R
N/A
N/A
N/A
N/A
7
6
5
4
PORTB7
PORTB6
PORTB5
PORTB4
R/W
R/W
R/W
R/W
0
0
0
0
7
6
5
4
DDB7
DDB6
DDB5
DDB4
R/W
R/W
R/W
R/W
0
0
0
0
ATmega16A
3
2
1
0
ACME
PUD
PSR2
PSR10
R/W
R/W
R/W
R/W
0
0
0
0
3
2
1
0
PORTA3
PORTA2
PORTA1
PORTA0
R/W
R/W
R/W
R/W
0
0
0
0
3
2
1
0
DDA3
DDA2
DDA1
DDA0
R/W
R/W
R/W
R/W
0
0
0
0
3
2
1
0
PINA3
PINA2
PINA1
PINA0
R
R
R
R
N/A
N/A
N/A
N/A
3
2
1
0
PORTB3
PORTB2
PORTB1
PORTB0
R/W
R/W
R/W
R/W
0
0
0
0
3
2
1
0
DDB3
DDB2
DDB1
DDB0
R/W
R/W
R/W
R/W
0
0
0
0
SFIOR
“Con-
PORTA
DDRA
PINA
PORTB
DDRB
65